Patent
Accessing a Phase Change Memory
Ward Parkinson,Tyler Lowrey +1 more
- 07 Nov 2007
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TL;DR: In this paper, a memory employs a low-level current source to access a phase change memory cell, and the current source charges an access capacitor in order to store sufficient charge for an ensuing access.
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Abstract: A memory employs a low-level current source to access a phase change memory cell. The current source charges an access capacitor in order to store sufficient charge for an ensuing access. When a memory cell is accessed, charge stored on the capacitor is discharged through the phase change memory, supplying a current to the phase change memory cell that is sufficient for the intended access operation and greater than that provided directly by the current source.
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Citations
Patent
Memory system with sectional data lines
Tianhong Yan,Luca G. Fasoli +1 more
- 17 Jul 2009
TL;DR: In this paper, the authors propose a three-dimensional memory array with multiple layers of nonvolatile storage elements grouped into blocks, where each block is associated with two sense amplifiers and all blocks of a particular bay share a group of sense amplifier associated with the blocks of the particular bay.
62
Patent
Modification of logic by morphological manipulation of a semiconductor resistive element
John M. DeLucca,James T. Cargo,Frank A. Baiocchi +2 more
- 06 Aug 2010
TL;DR: In this article, a read module is configured to determine a resistance of the resistive element, and a programming module is used to cause a current to flow through the semiconductor region.
62
Patent
Continuous programming of non-volatile memory
Tianhong Yan,Luca G. Fasoli +1 more
- 20 Sep 2009
TL;DR: In this paper, a non-volatile storage system connects a signal driver to a first control line that is connected to first nonvolatile (volatile) storage element, charges the second control line using signal driver while the signal driver was connected to the first controller line.
55
Patent
Apparatus and method for determining a memory state of a resistive n-level memory cell and memory device
Peter Schroegmeier,Stefan Dietrich +1 more
- 28 Feb 2008
TL;DR: In this paper, the memory state of a resistive n-level memory cell is determined by applying a voltage between a first electrode and a second electrode of the resistive memory cell.
53
Patent
Memory system with data line switching scheme
Tianhong Yan,Luca G. Fasoli +1 more
- 23 May 2012
TL;DR: In this article, a storage system includes a three-dimensional memory array that has multiple layers of non-volatile storage elements grouped into blocks, and each block includes a subset of first selection circuits for selectively coupling array lines (e.g. bit lines) of a first type to respective local data lines.
40
References
Patent
Phase change memory device providing compensation for leakage current
Hyung-Rok Oh,Woo-Yeong Cho,Hye-Jin Kim +2 more
- 29 Dec 2005
TL;DR: In this article, a read operation is performed on one of the memory cells by selecting the bitline and a corresponding wordline, and leakage current produced by non-selected memory cells is detected by a leakage detecting circuit and compensated by leakage current supply circuit.
23
Patent
Memory that limits power consumption
Jan Boris Philipp,Thomas Nirschl +1 more
- 07 Dec 2006
TL;DR: In this article, a memory including resistive memory cells, a pulse generator, and a circuit is presented, each of which is programmable to each of at least two states.
16
Patent
Memory erase management system
Colin S. Bill,Mark Alan McClain,Michael A. Vanbuskirk +2 more
- 07 Sep 2006
TL;DR: In this article, a memory erase management system is provided, including providing a resistive change memory cell, coupling a first line to the resistor change memory, and coupling a line buffer to the first line, providing a charge storage device coupled to the line buffer.
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