TL;DR: In this article, the authors present a system and methods for identifying where the video output system should read from the frame buffer and where it must read from a full-motion video buffer while minimizing the amount of area it reads from both the Frame buffer and the Full Motion Video Buffer.
Abstract: A video output system in a computer system reads pixel information from a frame buffer to generate a video output signal In addition, a full-motion video may also be displayed Reading from both the frame buffer and the full-motion video buffer when displaying the full-motion video window wastes valuable memory bandwidth Thus, the disclosed system provides a system and methods for identifying where the video output system must read from the frame buffer and where it must read from the full-motion video buffer while minimizing the amount of area it reads from both the frame buffer and the full-motion video buffer
TL;DR: In this paper, a method and device for enhanced rendering providing reduced memory bandwidth requirements in a graphics processor was proposed, where a classification buffer of limited bit length was used for classifying the pixels.
Abstract: A method and device for enhanced rendering providing reduced memory bandwidth requirements in a graphics processor. In the rendering process, a classification buffer of limited bit length is used for classifying the pixels. Based on the classification, a decision on the pixel color may be made without accessing the multi-sample buffer for a portion of the pixels. This reduces the memory bandwidth requirements.
TL;DR: This paper presents the finished store buffer (or FSB), an alternative and position-insensitive approach for building a scalable store buffer for an out-of-order processor by exploiting the fact that only a small portion of in-flight stores are done executing and waiting for retirement.
Abstract: This paper presents the finished store buffer (or FSB), an alternative and position-insensitive approach for building a scalable store buffer for an out-of-order processor. Exploiting the fact that only a small portion of in-flight stores are done executing (i.e. finished) and waiting for retirement, we are able to build a much smaller and more scalable store buffer. Our study shows that we only need at most half of the number of entries in a conventional store queue if we buffer only the stores that have finished execution. Entries in the store buffer are allocated at issue and disallocated on retirement. A clever encoder circuit is used to provide positional searches without an explicitly positional queue structure. While reducing the access latency and power consumption significantly, our technique has virtually no detrimental effect on per-cycle performance (IPC).
TL;DR: In this article, a feature phone has two processors that share a display, and the display is attached to an applications processor that has a frame buffer for refreshing the display, while the base-band processor also runs programs that generate graphics data that is written to a baseband frame buffer.
Abstract: A feature phone has two processors that share a display The display is attached to an applications processor that has a frame buffer for refreshing the display A base-band processor also runs programs that generate graphics data that is written to a base-band frame buffer Updates to the base-band frame buffer are sent through a shared-memory interface to a shared memory, and a shared mailbox is written with the message length, triggering a mailbox-interrupt to the applications processor The applications processor reads the message from the shared memory and updates a copied frame buffer An overlay engine uses the copied frame buffer to refresh the display when the base-band processor has the focus, or to refresh a smaller base-band window that covers a portion of the display, leaving the rest of the display area for applications-processor graphics data Rapid switching between the copied and local frame buffer is possible
TL;DR: In this paper, the authors propose a data buffering device and a decentralized control system which guarantee the concurrency of data, generates no wait time when data are read and written, and provides latest data at the start of the read of the data.
Abstract: PROBLEM TO BE SOLVED: To obtain a data-buffering device and a decentralized control system which guarantee the concurrency of data, generates no wait time when data are read and written, and provides latest data at the start of the read of the data. SOLUTION: Three physical buffers 222, 224, and 226 are provided in the data buffering device 200, which stores data provided from a data providing part 100 to a data reference part 110, and the numbers of the physical buffers corresponding to a buffer (write buffer) to that the data providing part 100 writes data to, a buffer (read buffer) cut of which the data reference part 110 reads data, and a buffer (storage buffer) that is disabled in access from either of them is held in a buffer information register 211. A buffer controller 217 replaces the values in the buffer information register 211, to replaces the physical buffers corresponding to the write buffer, read buffer, an storage buffers.