Abstract: Described are techniques for performing data storage optimizations. A data storage optimizer on a first data storage system connected to a set of other data storage systems receives performance classification information. The first data storage system includes a first set of storage devices of a first performance classification. The set of other data storage systems includes a second set of storage devices of a second performance classification different from the first performance classification. A write operation is received from the host to write first data to a target address of a virtually provisioned device. It is determined that physical storage is not currently allocated for the target address of the virtually provisioned device. A first portion of physical storage is allocated for storing the first data. The first portion of physical storage is included in a storage device of the second set having the second performance classification.

Abstract: A method and system are disclosed for controlling the storage of data in a storage device to reduce fragmentation. The method may include a controller of a storage device receiving data for storage in non-volatile memory, proactively preventing fragmentation by only writing an amount of sequentially addressed logical groups of data into a main storage area of the storage device, such as multi-level cell (MLC) flash memory, and reactively defragmenting data previously written into the MLC memory when a trigger event is reached. The system may include a storage device with a controller configured to perform the method noted above, where the thresholds for minimum sequential writes into MLC, and for scanning the memory for fragmented data and removing fragmentation by re-writing the fragmented data already in MLC into new MLC blocks, may be fixed or variable.

Abstract: DRAM-based main memories have read operations that destroy the read data, and as a result, must buffer large amounts of data on each array access to keep chip costs low. Unfortunately, system-level trends such as increased memory contention in multi-core architectures and data mapping schemes that improve memory parallelism lead to only a small amount of the buffered data to be accessed. This makes buffering large amounts of data on every memory array access energy-inefficient; yet organizing DRAM chips to buffer small amounts of data is costly, as others have shown [11]. Emerging non-volatile memories (NVMs) such as PCM, STT-RAM, and RRAM, however, do not have destructive read operations, opening up opportunities for employing small row buffers without incurring additional area penalty and/or design complexity. In this work, we discuss and evaluate architectural changes to enable small row buffers at a low cost in NVMs. We find that on a multi-core system, reducing the row buffer size can greatly reduce main memory dynamic energy compared to a DRAM baseline with large row sizes, without greatly affecting endurance, and for some NVM technologies, leads to improved performance.

Abstract: A storage control device is disclosed including a write block and a read block. The write block establishes a high-speed access data count. If a plurality of data are to be written to high- and low-speed access storage blocks, the write block writes as many data as the high-speed access data count from among the plurality of data to the high-speed access storage block as high-speed access data while writing the remaining data to the low-speed access storage block as low-speed access data. If the plurality of data written to the low- and high-speed access storage blocks are to be read, the read block issues a request to the high-speed access storage block to read the high-speed access data and a request to the low-speed access storage block to start reading the low-speed access data after the high-speed access data have been read.

Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.

Abstract: An apparatus, system, and method are disclosed for storing information in a storage device that includes multi-level memory cells. The method involves storing data that is written to the storage device in the LSBs of the multi-level memory cells, and storing audit data in the MSBs of the multi-level memory cells. The audit data can be read separately from the data and used to determine whether or not there has been any unintended drift between states in the multi-level cells. The audit data may be used to correct data when the errors in the data are too numerous to be corrected using error correction code (ECC). The audit data may also be used to monitor the general health of the storage device. The monitoring process may run as a background process on the storage device. The storage device may transition the multi-level memory cells to operate as single-level memory cells.

Abstract: A method for data storage includes providing a memory, which includes multiple groups of memory cells and is configured to concurrently store first data using a first storage configuration having a first access time, and second data using a second storage configuration having a second access time, longer than the first access time, such that each memory cell in each of the groups stores at least one bit of the first data and one or more bits of the second data. Data items are accepted for storage in the memory. The accepted data items are classified into a fast-access class and a normal-access class. The data items in the fast-access class are stored in the memory using the first storage configuration, and the data items in the normal-access class are stored in the memory using the second storage configuration.

Abstract: A semiconductor storage device has a nonvolatile semiconductor memory comprised from multiple storage areas, and a controller, which is coupled to the nonvolatile semiconductor memory. The controller (A) identifies a storage area state, which is the state of a storage area, (B) decides, based on the storage area state identified in the (A), a read parameter, which is a parameter for use when reading data from a storage area with respect to a storage area of this storage area state, and (C) uses the read parameter decided in the (B) with respect to a read-target storage area and reads data from this read-target storage area.

Abstract: A storage device uses non- volatile memory devices for caching. The storage device operates in a mode referred to herein as write-back mode. In write-back mode, a storage device responds to a request to write data by persistently writing the data to a cache in a non-volatile memory device and acknowledges to the requestor that the data is written persistently in the storage device. The acknowledgement is sent without necessarily having written the data that was requested to be written to primary storage. Instead, the data is written to primary storage later.

Abstract: Random sequence data is sequentially generated based on a seed assigned to a selected memory space, and one of access-requested segments of the selected memory space is logically combined with the sequentially generated random sequence data to transfer the access-requested segment. The sequentially generating and the logically combining are iteratively performed until remaining access-requested segments all transferred.

Abstract: Provided are a computer program product, system, and method for caching data in a storage system having multiple caches. A sequential access storage device includes a sequential access storage medium and a non-volatile storage device integrated in the sequential access storage device, received modified tracks are cached in the non-volatile storage device, wherein the non-volatile storage device is a faster access device than the sequential access storage medium. A spatial index indicates the modified tracks in the non-volatile storage device in an ordering based on their physical location in the sequential access storage medium. The modified tracks are destaged from the non-volatile storage device by comparing a current position of a write head to physical locations of the modified tracks on the sequential access storage medium indicated in the spatial index to select a modified track to destage from the non-volatile storage device to the storage device.

Abstract: A storage array, a storage system, and a data access method. A data access method of a storage device includes: transferring data input from a user interface chip to a non-volatile storage device through a peripheral component interconnect express (PCIE) link, where the user interface chip and the non-volatile storage device are connected to the PCIE link, and the non-volatile storage device includes a memory and a non-volatile storage medium; writing the data to the memory of the non-volatile storage device; and writing the data written in the memory of the non-volatile storage device to the non-volatile storage medium. The technical solutions provided by the embodiments of the present disclosure are advantageous for reducing occupation of PCIE links due to data access and improving system performance.

Abstract: A storage system has a RAID group configured by storage media, a system controller with a processor, a buffer memory coupled to storage devices and the processor by a communication network, and a cache memory coupled to the processor and the buffer memory by the network. A processor that stores first data, which is related to a write request from a host computer, in a cache memory, specifies a first storage device for storing data before update, which is data obtained before updating the first data, and transfers the first data to the specified first storage device. A first device controller transmits the first data and second data based on the data before update, from the first storage device to the system controller. The processor stores the second data in the buffer memory, specifies a second storage device, and transfers the stored second data to the specified second storage device.

Abstract: A method of managing a storage region of a memory device, and a storage apparatus using the method. In the method, data blocks are arranged in an order of performing writing on the memory device; a frequency of updating data in a logical page to be written is determined, based on whether an invalid physical page is present in a block within a window size that is initially set based on a most recently written data block from among the arranged data blocks, in response to a write request, and the data in the logical page is stored in a storage region of the memory device classified according to the determined frequency, according to the determined frequency.

Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.

Abstract: According to one embodiment, a storage device management device is connected to a random access memory and a first storage device. When the random access memory includes a free region sufficient to store write data, the write data is stored onto the random access memory. Data on the random access memory selected in the descending order of elapsed time from the last access is sequentially copied onto the first storage device, and a region in the random access memory which has stored the copied data is released. When stored on the random access memory, the read data is read from the random access memory to the processor. When stored on the first storage device, the read data is copied onto the random access memory and read from the random access memory to the processor.

Abstract: An access of data in a memory device is sampled. In response to the sampled access of data, a refresh operation is performed in the memory device.

Abstract: A storage system comprises a first controller and a plurality of storage devices. The plurality of storage devices configure RAID, each of which includes one or more non-volatile memory chips providing storage space where data from a host computer is stored, and a second controller coupled to the non-volatile memory chips. In case where the first controller receives an update request to update first data to second data from the host computer, the second controller in a first storage device of the storage devices is configured to store the second data in an area different from an area where the first data has been stored, in the storage space of the first storage device; generate information that relates the first data and the second data; and generate an intermediate parity based on the first and the second data.

Abstract: Embodiments for managing data in a hierarchical storage server storing data blocks of a database system comprising primary storage devices being in an active mode and secondary storage devices being in one of an active and passive mode are provided. In response to read and write requests for data blocks at logical storage locations, a block mapping device determines physical storage locations on the storage devices. Read requests switch over secondary storage devices to the active mode when they are in the passive mode. Write requests write data blocks only to the primary storage devices. Secondary storage devices that have not been accessed for a minimum activation time may be switched over from the active to the passive mode to save power consumption and cooling. Data migration and data recall policies control moving of data blocks between the primary and secondary storage devices and are primarily based on threshold values.

Abstract: Numerical simulation of complex computational fluid dynamics problems evolving in time plays an important role in scientific and engineering applications. Accurate behavior of dynamical systems can be understood using large scale simulations which traditionally requires expensive super-computing facilities. In the paper a Field Programmable Gate Array (FPGA) based framework is described to accelerate simulation of complex physical spatio-temporal phenomena. Simulating complicated geometries requires unstructured spatial discretization which results in irregular memory access patterns severely limiting computing performance. Data locality is improved by mesh node renumbering technique which results in a sequential memory access pattern. Additionally storing a small window of cell-centered state values in the on-chip memory of the FPGA can increase data reuse and decrease memory bandwidth requirements. Generation of the floating-point data path and control structure of the arithmetic unit containing dozens of operators is a very challenging task when the goal is high operating frequency. Efficiency and use of the framework is described by a case study solving the Euler equations on an unstructured mesh using finite volume technique. On the currently available largest FPGA the generated architecture contains three processing elements working in parallel providing 75 times speedup compared to a high performance microprocessor.

Abstract: A storage architecture of a storage system environment has a storage connector interface configured to exchange data directly between flash storage devices on a server and a storage array of the environment so as to bypass main memory and a system bus of the server. According to one or more embodiments, the storage connnector interface includes control logic configured to implement the data exchange in accordance with one of a plurality of operational modes that deploy and synchronize the data on the flash storage devices and the storage array. Advantageously, the storage connector interface obviates latencies and bandwidth consumption associated with prior data exchanges over the main memory and bus, thereby enhancing storage architecture performance.

Abstract: Provided is a storage apparatus to provide a data storage area to an external apparatus. The storage apparatus includes a storage drive to provide a physical storage area for the data storage area; and a storage control unit to manage the data storage area as an un-compression storage area that is a logical storage area for storing data in the external apparatus in an uncompressed form and as a compression storage area that is a logical storage area for storing data in the external apparatus in a compressed form, and to control each of data write processing and data read processing on the storage drive according to a data input-output request from the external apparatus. The compression storage area and the un-compression storage area each include a set of unit physical storage areas formed by dividing the physical storage area. The storage control unit includes an un-compression cache area that is a temporary memory area for storing uncompressed data, a compression cache area that is a temporary memory area for storing compressed data, and a read cache area that is a temporary memory area for storing data read from the compression storage area. When reading data from the compression storage area in response to a data read request from the external apparatus, the storage control unit decompresses the read data and stores the decompressed data to the read cache area. In a case where the storage control unit receives a data read request from the external apparatus and where read target data of the data read request is stored in the compression storage area, the storage control unit judges whether or not the read target data is stored in the read cache area. When judging that the data is stored in the read cache area, the storage control unit transfers the data stored in the read cache area to the external apparatus. When judging that the data is not stored in the read cache area, the storage control unit reads the read target data from the compression storage area, decompresses the data, and then transfers the decompressed data to the external apparatus.

Abstract: Disclosed are various embodiments for storage of files. A portable memory device is configured to couple to a computing device, and a storage management application is stored in the portable memory device, the storage management application being executable by a processor circuit. The storage management application is configured to send a plurality of files for storage in a networked storage system, the networked storage system being remote to the computing device. The storage management system caches a subset of the files on the portable memory device and maintains a local file directory in the portable memory device. The local file directory lists the files stored in the networked storage system in association with an account linked to the portable memory device.

Abstract: Many cognitive processes rely on the ability of the brain to hold sequences of events in short-term memory. Recent studies have revealed that such memory can be read out from the transient dynamics of a network of neurons. However, the memory performance of such a network in buffering past information has only been rigorously estimated in networks of linear neurons. When signal gain is kept low, so that neurons operate primarily in the linear part of their response nonlinearity, the memory lifetime is bounded by the square root of the network size. In this work, I demonstrate that it is possible to achieve a memory lifetime almost proportional to the network size, "an extensive memory lifetime", when the nonlinearity of neurons is appropriately utilized. The analysis of neural activity revealed that nonlinear dynamics prevented the accumulation of noise by partially removing noise in each time step. With this error-correcting mechanism, I demonstrate that a memory lifetime of order $N/\log N$ can be achieved.

Abstract: A method for operating a memory controller is provided. The method includes generating a pseudo random number by using a seed included in a stored seed group corresponding to a page to be currently programmed, wherein the stored seed group is stored among a plurality of seed groups. Data to be programmed into the current page is randomizing by using the pseudo random number and the memory controller outputs the randomized data. A solid state drive (SSD) or other memory storage device such as a memory card includes the memory controller and includes a read only memory (ROM) storing the plurality of seed groups. The memory controller includes a micro-processor and a read only memory (ROM) storing executable code for causing the micro-processor to access the plurality of stored seed groups and to select a seed therefrom corresponding to a page to be currently programmed.

Abstract: Mechanisms are provided for importing pre-existing data into a storage system utilizing a current storage management system that is different from an original storage management system used to create the pre-existing data. One or more data storage devices are integrated into the storage system in-place without modification of the pre-existing data stored on the one or more data storage devices. Metadata for the pre-existing data is created based on a linear progression of data in the pre-existing data. Read access requests targeting the pre-existing data are executed using the created metadata. Write access requests targeting the pre-existing data are executed by redirecting the write access requests to a copy of the pre-existing data created in another storage location.

Abstract: An abstraction for storage class memory is provided that hides the details of the implementation of storage class memory from a program, and provides a standard channel programming interface for performing certain actions, such as controlling movement of data between main storage and storage class memory or managing storage class memory.

Abstract: A method for data storage includes storing two or more data items in a non-volatile memory. Redundancy information is calculated over the data items, and the redundancy information is stored in a volatile memory. Upon a failure to retrieve a data item from the non-volatile memory, the data item is reconstructed from remaining data items stored in the non-volatile memory and from the redundancy information stored in the volatile memory.