Abstract: In this review the role of stress in the high temperature oxidation of metals is examined. In the introductory sections the Wagner theory of oxide growth and its modification to account for short circuit diffusion are outlined. The direct influence of oxide growth stresses on defect diffusion is then examined and shown to be a significant factor when constrained volume changes accompany the growth of the oxide layer. Methods for evaluating growth stresses are critically reviewed and the possible origins of such stresses considered in detail. The response of the oxide layer to thermally and mechanically induced stresses is considered in the last part of the review. Under tensile conditions, through-thickness cracks can readily be produced but may also heal with fresh oxide if imposed strain rates are relatively low. Spallation of the oxide is not usually found under tensile conditions but occurs frequently under compressive stresses by either a ‘buckling’ or ‘wedginq’ process. Detailed descriptions...

Abstract: PURPOSE:To provide excellent abrasion resistance by applying a thermoplastic synthetic resin to the surface of the fancy veneer bonded to the surface of a substrate through an adhesive not only to infiltrate a part thereof into the fancy veneer but also to form a thermosetting synthetic resin layer and forming a film layer containing an abrasive material on the synthetic resin layer. CONSTITUTION:Substrate treatment is applied to the surface of a substrate 1 if necessary and an adhesive 4 is applied to the treated surface of the substrate 1 by a coating device. Next, fancy veneer 2 coated with a thermosetting resin is placed on the substrate 1 and the fancy veneer 2 and the substrate 1 are pressed between upper and lower clamp plates under pressure by a flat plate press not only to infiltrate the thermosettlng resin in the fancy veneer 2 under pressure but also to cure the thermosetting resin to form a thermosetting resin layer 3 on the surface of the fancy veneer 2 while forming a thermosetting resin impregnated part 3a in the fancy veneer 2 on the surface side thereof. Further, a film layer 6 having abrasion resistance is formed on the thermosetting resin layer 3 by applying paint mixed with an abrasive material 5 to the resin layer 3.

Abstract: A protective layer is disclosed for protecting parts against corrosion and oxidation at high temperatures and against excessive thermal stresses. The protective layer has a heat-insulating layer made of a ceramic material and an adhesive layer made of a rhenium-containing metal alloy. The metal alloy is one of the alloys described by the generic term MCrAlY, in which M stands for cobalt and/or nickel and Y stands for yttrium and/or at least an equivalent metal from the group that comprises scandium and rare earth elements. The protective layer is characterised by a high oxidation and corrosion resistance of the alloy, by remarkable thermal fatigue resistance properties and by an effective and durable connection between alloy and ceramic heat-insulating layer. Thanks to this heat insulation, the outer face of the protective layer may be exposed to a considerably higher temperature in comparison with purely metallic protective layers without exposing the protected parts to an increased thermal stress. The protective layer is thus particularly suitable for parts of a gas turbine exposed to overheated flue gas, for example guide blades, moving blades or thermal shields.

Abstract: The layer-by-layer molecular-level manipulation of conjugated polyions has been successfully utilized to fabricate ultrathin multilayer films and multilayer heterostructures. Through a process involving the alternate spontaneous adsorption of oppositely charged polymers from dilute aqueous solutions, multilayer thin films were fabricated from a variety of different bilayer combinations including conjugated/nonconjugated polyion bilayers, conjugated/conjugated polyion bilayers, and precursor polymer/conjugated polyion bilayers. UV-vis absorbance measurements revealed that in all cases the bilayer deposition process was linear and highly reproducible from layer to layer. Kinetic studies showed that the equilibrium adsorption of a polyion layer is reached within about 10 min and the process can be carried out onto different substrate surfaces. The typical bilayer thickness ranges from approximately 10 to 25 A and can be readily controlled by variations in such parameters as solution concentration, pH, doping level, and ionic strength.

Abstract: An improved support post (16, 23, 25) for micro-mechanical devices (10). A via (34a) that defines the outer surface of the support post (16) is etched into a spacer layer (34). An oxide layer (41) is conformally deposited over the spacer layer (34) and into the via (34a), and then etched back to the top surface of the spacer layer (34), leaving a sidewall ring (23a) on the inner surface of the via (34a). Next, a metal layer (61) is deposited over the spacer layer (34) and into the via (34a) so as to cover the sidewall ring (23a). This metal layer (61) is then etched to form a support post stem (23) inside the via (34a). The spacer layer (34) is removed, leaving the support post stem (23) and a sidewall ring (23a) around the stem (23).

Abstract: An organic electroluminescent device comprises an anode, a positive-hole transport layer made of an organic compound, an emitting layer made of an organic compound, and a cathode which are layered in sequence, further comprising an electron-injecting layer containing at least one of alkaline earth metal oxides and disposed between the emitting layer and the cathode. This device emits light at a high luminance and a high efficiency upon application of a low voltage together with reduction of the decrement of luminance in the running of emitting light of the device. Selection scope for cathode materials is expanded because of the device is free from the restriction of a low work function for the cathode layer. The cathode can be made a transparent electrode such as ITO. Anode and cathode lines may be formed with low resistance material. As a result, emitting efficiency and life time of the device is improved.

Abstract: A slurry for use in chemical-mechanical polishing of a metal layer comprising high purity fine metal oxide particles uniformly dispersed in a stable aqueous medium.

Abstract: We have successfully fabricated multilayered Co/Cu nanowires with different diameters and various layer thicknesses by electrodeposition. They display a large perpendicular giant magnetoresistance up to 11% at room temperature and 22% at 5 K. The spin-flip diffusion length has been directly measured to be about 210 for this system. © 1995 The American Physical Society.

Abstract: An organic Electroluminescence device comprises an electron hole transport layer, an organic emitting layer and an organic hole transport layer laminated in sequence and arranged between the cathode and the anode, in characterized in that the electron transport layer made of 1,10- or 1,7- or 4,7-phenanthroline derivative or 5,6 -dihydro-dibenzo[bj]phenanthroline derivative. This Electroluminescence device is capable of improving the durability and to emit blue light at a high luminance and a high efficiency upon application of a low voltage.

Abstract: PURPOSE:To obtain high brightness at low drive voltage by providing a hardened material layer which is obtained through the heattreatment of hardened material composed of compound including a plurality of acid anhydride, and of resin in an epoxy series. CONSTITUTION:A transparent electrode to be a positive electrode A is formed over a transparent basement E such as glass, transparent plastics and the like, and a hardened material layer B which can be obtained through the heattreatment of hardened material composed of compound including a plurality of acid anhydride, and of resin in an epoxy series, is formed over the aforesaid transparent electrode. As for the layer B, compound including a plurality of acid anhydride and resin in an epoxy series are formed into a film, it is preparatorily hardened, and furthermore it is heattreated so as to be formed into the layer B. Next, an electric field luminous material layer C is formed over the layer B, and a negative electrode D is provided over the layer C. By this constitution, drive voltage can be lowered, and the maximum brightness can be enhanced, and the uniformity of emission can also be enhanced. Besides, by the use of the layer B high in insulating withstand voltage, the drive stability of elements can be remarkably improved for example, withstanding dielectric breakdown properties are enhanced and so on.

Abstract: A high breakdown voltage semiconductor device comprising a semiconductor substrate an insulating layer formed on the semiconductor substrate, a high resistance semiconductor layer formed on the insulating layer, an isolation region formed in the high resistance semiconductor layer, an element region formed in the high resistance semiconductor layer isolated by the isolation region in a lateral direction, a first low resistance region of a first conductivity type formed in a central surface portion of the element region, and a second low resistance region of a second conductivity type formed in a peripheral surface portion of the element region. Dose of impurities in the element region is set such that a portion of the element region between the first low resistance region and the second low resistance region is completely depleted when voltage is applied between the first and second low resistance regions.

Abstract: A multi-chip module is provided which utilizes benzocyclobutene as a laminate adhesive for bonding the upper dielectric films in a high density interconnect structure. The benzocyclobutene thermosetting polymer is spin coated on a polyimide film, and baked at low temperature to remove any solvent to leave a B-staged coating on the polyimide film. The composite film can be laminated to an underlying electrical structure using a vacuum laminator and heat. As the heat is applied, the BCB layer softens, flows and then cures to bond the polyimide film to the underlying electrical structure.

Abstract: A method for forming a self-limiting, silicon based interconnect for making temporary electrical contact with bond pads on a semiconductor die is provided. The interconnect includes a silicon substrate having an array of contact members adapted to contact the bond pads on the die for test purposes (e.g., burn-in testing). The interconnect is fabricated by: forming the contact members on the substrate; forming a conductive layer on the tip of the contact members; and then forming conductive traces to the conductive layer. The conductive layer is formed by depositing a silicon containing layer (e.g., polysilicon, amorphous silicon) and a metal layer (e.g., titanium, tungsten, platinum) on the substrate and contact members. These layers are reacted to form a silicide. The unreacted metal and silicon containing layer are then etched selective to the conductive layer which remains on the tip of the contact members. Conductive traces are then formed in contact with the conductive layer using a suitable metallization process. Bond wires are attached to the conductive traces and may be attached to external test circuitry. Alternately, another conductive path such as external contacts (e.g., slide contacts) may provide a conductive path between the conductive traces and external circuitry. The conductive layer, conductive traces and bond wires provide a low resistivity conductive path from the tips of the contact members to external test circuitry.

Abstract: Ferroelectric thin films of bismuth layer structured compounds, SrBi2Ta2O9, SrBi2Nb2O9, SrBi4Ti4O15 and their solid solutions, were formed onto a sputtered platinum layer on a silicon substrate using spin-on technique and metal-organic decomposition (MOD) method X-ray diffraction (XRD) analysis and some electrical measurements were performed on the prepared thin films XRD results of SrBi2(Ta1-x , Nbx )2O9 films (0?x?1) showed that niobium ions substitute for tantalum ions in an arbitrary ratio without any change of the layer structure and lattice constants Furthermore, XRD results of SrBi2x Ta2O9 films (0?x?15) indicated that the formation of the bismuth layer structure does not always require an accurate bismuth content The layer structure was formed above 50% of the stoichiometric bismuth content in the general formula SrBi2(Ta1-x , Nbx )2O9 films with various Ta/Nb ratios have large enough remanent polarization for nonvolatile memory application and have shown high fatigue resistance against 1011 cycles of full switching of the remanent polarization Mixture films of the three compounds were also investigated

Abstract: Oriented sexiphenyl (6P) film was prepared through epitaxial growth on rubbed substrates by vacuum deposition. Polarized absorption spectra demonstrated that the long axis of 6P molecule was highly oriented along the rubbing direction. Using the epitaxial growth film of 6P, we fabricated electroluminescent (EL) devices consisting of indium‐tin‐oxide anode, emissive layer of 6P, electron‐transporting layer of an oxadiazole derivative, and MgAg alloy cathode. Owing to the orientation of 6P molecules, EL polarized in the rubbing direction was observed in the devices.

Abstract: The surface of a device that is surgically implantable in living bone is prepared. The device is made of titanium with a native oxide layer on the surface. The method of preparation comprises the steps of removing the native oxide layer from the surface of the device and performing further treatment of the surface substantially in the absence of unreacted oxygen.

Abstract: A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. The via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies with vias can be stacked on top of each other or surface mounted to printed circuit boards or other substrate.

Abstract: A method of making a three dimensionally integrated circuit by connecting first and second substrates (1;7) provided with devices in at least one layer in at least one surface in each of said substrates An auxiliary substrate is connected to the one surface of one of said substrates which is then reduced in thickness from its opposite surface The auxiliary layer with the devices thereon is then separated into individual chips which after having been found to be functioning are aligned and mounted in a side-by-side arrangement on said one surface of said first substrate Electrical connection are formed between the devices of the mounted chips and the devices in the first substrate

Abstract: A package for mounting a semiconductor device to a circuit board. An insulating substrate is provided, which has at least one layer, and provides rigidity to the package. A plurality of electrically conductive contacts are disposed on the top surface of the substrate, receive the semiconductor device, and make electrical contact between the semiconductor device and the substrate. A plurality of electrically conductive through-holes are formed in the substrate, and extend from the top surface of the substrate to the bottom surface of the substrate. The through-holes make electrical connection between all of the layers of the substrate. Electrical interconnections between the contacts and the through-holes are provided by a plurality of electrically conductive traces. A z-conductive layer is attached to the bottom surface of the substrate. Electrical continuity between the bottom surface of the z-conductive layer and the through-holes extending to the bottom surface of the substrate is substantially limited to the z axis of the z-conductive layer according to a predetermined pitch. A plurality of electrically conductive connectors are attached to the bottom surface of the z-conductive layer, and are disposed so as to be in electrical contact through the z-conductive layer with no more than one through-hole.

Abstract: A novel thin-film processing technique has been developed for the fabrication of ultrathin films of conducting polymers with angstrom-level control over thickness and multilayer architecture. As part 2 of this series, we present here the molecular self-assembly of p-doped conducting polymers (e.g., polypyrrole and polyaniline), a layer-by-layer process in which a substrate is alternately dipped into a chemically active aqueous solution of an in-situ polymerized conjugated polymer and a solution of a polyanion. In-situ oxidative polymerization produces continuously the highly conductive, underivatized form of the conjugated polymer, which is deposited in single layers of precisely controlled thickness as it is formed. The thickness of each layer, ranging from 20 to 60 A, can be fine-tuned by adjusting the dipping time and the solution chemistry. The surface chemistry of the substrate (hydrophobic, charged, etc.) is key in determining the deposition characteristics and uniformity of the film. Widely different deposition characteristics onto different surfaces make it possible to selectively deposit conducting polymers onto certain, well-defined regions of a substrate by patterning the surface with different chemistries. Typical multilayer films exhibit conductivities in the range of 20-80 S/cm ; however, ultrathin films with conductivities over 300 S/cm can be made with suitable adjustments to the solution chemistry.

Abstract: A method is presented for forming a bumped substrate and for forming an electrical circuit which includes the bumped substrate. The method of forming the bumped substrate includes forming at least one electrically conductive polymer bump on each of a first set of bond pads of the substrate. At least one electrically conductive polymer bump is then formed on each of a second set of the bond pads of the substrate. The circuit is formed by selectively forming an organic protective layer around the bond pads of a second substrate by laser ablation of an organic protective coating on the second substrate. The electrically conductive polymer bumps on the first and second portions of the bond pads of the first substrate are then contacted with the bond pads of the second substrate, thereby forming the electrical circuit.

Abstract: A process for forming an planar dielectric layer over metallurgy lines using an in situ multi-step electron cyclotron resonance (ECR) oxide deposition process. A substrate with metallurgy lines on its surface is covered with a protective ECR oxide layer. The novel ECR process for the protective layer does not have an argon flow and does not etch the surface (e.g., metal lines) it is deposited upon. Next, a gap-fill step is formed over the protective layer. The gap-fill step uses Argon flow and rf power to enhance the deposition in gaps and the planarization. The gap-fill layer etches the underlying protective layer but the protective layer prevents the gap-fill deposition/etch process from attacking and damaging the metallurgy lines. Next, the protective layer and the gap-fill layer sequence are repeated until the desired thickness is obtained. A thick capping protective layer and a capping gap-fill layer are used to complete the planarization process. This multi-step in situ process permits the use of the corrosive Gap-fill ECR process which can fill between closely spaced metallurgy lines without damaging the lines.

Abstract: PROBLEM TO BE SOLVED: To enhance the luminous output of a semiconductor laser by a method, wherein first second and third N-type layers and an active layer having a multiple quantum well structure are laminated on an N-type contact layer, and the laminated material is formed into a double heterostructure. SOLUTION: A selective etching is performed from a P-type contact layer 11 of a wafer formed into a structure, wherein a buffer layer 2 and a contact layer 3 are grown on the surface of a sapphire substrate 1. A first n-type layer 4 consisting of an n-type InGaN layer, a second N-type layer 5 consisting of an n-type AlGaN layer, a third n-type layer 6 consisting of an n-type GaN layer, and an active layer 7 consisting of a multiple quantum well structure, are grown on the layer 3 and three layers of p-type nitride semiconductor layers 8, 9 and 10, the p-type contact layer 11 are laminated on the layer 7, the surface of the n-type contact layer 3 is made to expose, and stripped electrodes are respectively formed on the exposed surface of the layer 3 and the surface of the layer 11. The grown layers 3 to 7, the laminated layers 8, 9, 10 and 11 and the electrode on the layer 11 are etched from the direction intersecting orthogonally the layers 3 to 11, the electrode on the layer 11, vertical etched end surfaces are formed to form a reflecting mirror, and the reflecting mirror is used as a resonance surface.

Abstract: A surface mountable integrated circuit and a method of manufacture are disclosed. A wafer 110 has a die with an integrated circuit 119 in one surface of the wafer. A via 130 extends to the opposite surface. the via has a sidewall oxide 131 and is filled with a conductive material such as metal or doped polysilicon. The metal may comprise a barrier layer and an adhesion layer. The second end of the via can be fashioned as a prong 233 or a receptacle 430. Dies 335a, 335b, 335c with conductive vias are stacked on top of each other. Other dies 341, 343 are connected together with an optical coupling die 342.

Abstract: A semiconductor device comprises a plurality of coloured deformable mirrors controllable by electrical circuitry. Groups of mirrors, responsive to the electronic signals, are selectably operable to reflect incident light. The deformable mirrors are coated with an optical thin film interference colour coating having at least a layer that is substantially transparent to the visible light. As well the optical thin filminterference colour coating includes at least one further layer that is partially absorbing with respect to the visible light. The spectral reflectance and absorptance of the deformable mirror is modified in order to obtain a desired reflectance colour by the process of optical interference enhanced absorption in the optical thin film interference colour coating. The optical thin film interference colour coating has predetermined layer thicknesses and materials; the substantially transparent layer substantially determines the desired reflected colour.

Abstract: This invention is a process for depositing tungsten metal on a silicon surface with the deposited layer having improved uniformity of thickness over prior art deposition techniques. The process involves the steps of removing any native silicon dioxide present on the silicon surface, forming a barrier layer which overlies the silicon surface which prevents the upward diffusion of silicon atoms from the polycrystalline surface, and depositing a final tungsten metal layer on top of the barrier layer. The barrier layer is preferably a refractory metal nitride. It may be formed directly by chemical vapor deposition, by reactive sputtering, or it may be formed indirectly by depositing a preliminary tungsten metal layer, subjecting the preliminary layer to a plasma formed from NH3 and N2 gases. Both preliminary and final tungsten metal layers are deposited preferably via chemical vapor deposition using the WF6 and SiH4 as reactants.

Abstract: A gallium nitride group compound semiconductor laser diode includes at least one pn junction layer disposed between an n-type layer and a p-type layer. The n-type layer is formed from a gallium nitride group compound semiconductor material defined by the composition equation (Alx Ga1-x)y In1-y N (where 0≦x≦1 and 0≦y≦1). The p-type layer, doped with an acceptor impurity, is obtained by electron beam irradiating a gallium nitride group compound semiconductor material defined by the composition equation (Alx' Ga1-x')y' In1-y' N (where 0≦x'≦1, 0≦y'≦1, x=x' or x≠x', and, y=y' or y≠y'). The improved gallium nitride group semiconductor laser diode of the present invention is found to emit light in the visible short wavelength spectrum of light which includes the blue, violet and ultraviolet regions.