TL;DR: An electro-optical oscillator as mentioned in this paper is an EO modulator having an electrical input port that accepts an electrical control signal and an optical output port, which can be used to generate an optical signal that oscillates at a frequency related to the electrical input signal.
Abstract: An electro-optical oscillator includes an electro-optical modulator having an electrical input port that accepts an electrical control signal and an optical output port. The electro-optical modulator is operable to generate at the optical output port an optical signal that oscillates at a frequency related to the electrical control signal. The oscillator also includes a photodetector that converts a portion of the optical signal from the optical output port of the electro-optical modulator to an electrical signal and provides the electrical signal to the electrical input port of the electro-optical modulator as the electrical control signal. An open loop gain of a feedback loop including the optical output port, the photodetector and the electrical input port is greater than one.
TL;DR: In this article, the issue of stability of the high-gain RF feedback loop is discussed, and details are given about a practical realization of the necessary very-narrow-band filter.
TL;DR: In this article, a non-linear carrier-pulsewidth modulator is proposed for control of high power-factor boost rectifiers, where the switch duty ratio is determined by comparing a signal derived from the main switch current with a periodic, nonlinear carrier signal.
Abstract: This patent disclosure describes new non-linear carrier-pulse-width modulators for control of high power-factor boost rectifiers. In the new modulators, the switch duty ratio is determined by comparing a signal derived from the main switch current with a periodic, nonlinear carrier signal νc (t, νm). The shape of the carrier is selected so that the resulting input current follows the input voltage, as required for unity-power-factor rectification. A slowly-varying modulating input νm can be used to adjust the power level and to regulate the output dc voltage. The controller based on the new non-linear-carrier modulator has a number of advantageous properties: sensing of the input line voltage is eliminated; for current shaping, only sensing of the power switch current is needed; current shaping does not require an error amplifier with feedback loop compensation; the multiplier in the voltage feedback loop is eliminated; and the converter operates in the continuous conduction mode. The controller is potentially well-suited for integrated-circuit implementation. It can be expected that a dedicated IC based on the feed-forward modulators disclosed here would be simpler and would require less i/o pins than ICs currently available for power-factor correction, while offering comparable or improved performance.
TL;DR: In this article, the inner-loop PD controller employs a quasi-Newton iterative feedback loop structure whereby the manipulated variables are computed in an iterative fashion as a function of the difference between the inner loop setpoint and the predicted controlled variable as advanced by the optimum prediction time, to incorporate the downstream limiting effects on the non-limited control loops.
Abstract: A method and apparatus for a robust process control system which utilizes a neural-network based multivariable inner-loop PD controller cascaded with decoupled outer-loop controllers with integral action, the combination providing a multivariable nonlinear PID and feedforward controller. The inner-loop PD controller employs a quasi-Newton iterative feedback loop structure whereby the manipulated variables are computed in an iterative fashion as a function of the difference between the inner loop setpoint and the predicted controlled variable as advanced by the optimum prediction time, in order to incorporate the downstream limiting effects on the non-limited control loops. The outer-loop controllers compensate for unmodeled process changes, unmeasured disturbances, and modeling errors by adjusting the inner-loop target values.
TL;DR: It is shown that by creating more degrees of freedom one can achieve the maximum SNR in a given modulator order without constraining the noise transfer function of the modulator.
Abstract: A new technique for designing an LC bandpass delta-sigma modulator is presented. This method is based on pulse shaping of a DAC output signal such that one can realize a desired (arbitrary) loop transfer function. Especially for higher-order modulators where extra LC sections are added, sufficient number of parameters are provided in the feedback loop. It is shown that by creating more degrees of freedom one can achieve the maximum SNR in a given modulator order without constraining the noise transfer function of the modulator.
TL;DR: In this paper, a charge pump circuit with negative current feedback is dislcosed and a feedback loop is used to control the conductivity of the switch circuit to regulate the output voltage of the charge pump.
Abstract: A charge pump circuit with negative current feedback is dislcosed. The charge pump circuit consists of charge pump stages, switch circuits in between the stages, and a feedback loop to control the conductivity of the switch circuit. The conductivity of the switch circuits is controlled by modulating the bias current of the switch circuit which modulates its conductivity. By using the feedback loop to control the conductivity, the output voltage of the charge pump circuit can be regulated.
TL;DR: In this paper, the authors describe SPICE simulation techniques that can be used to find the return ratios for the differential and common-mode feedback loops in balanced, fully differential circuits, and conditions under which these two return ratios are sufficient for determining stability of the balanced feedback circuit are described.
Abstract: This paper describes SPICE simulation techniques that can be used to find the return ratios for the differential and common-mode feedback loops in balanced, fully differential circuits. Since each of these loops may contain multiple feedback paths, conditions under which these two return ratios are sufficient for determining stability of the balanced feedback circuit are described. To allow the use of these techniques with switched-capacitor common-mode feedback circuits, a special simulation technique is presented that finds the dc bias for the return-ratio simulations.
TL;DR: An output feedback control strategy that uses the principle of transmission zero assignment achieves tracking for this nonminimum phase linear time-invariant system.
Abstract: This paper focuses on the tip-position control of a single flexible link which rotates in the horizontal plane. The dynamic model is derived using a Lagrangian assumed modes method based on Euler-Bernoulli beam theory. The model is then linearized about an operating point. An output feedback control strategy that uses the principle of transmission zero assignment achieves tracking for this nonminimum phase linear time-invariant system. The control strategy consists of two parts. The first part is an inner (stabilizing) control loop that incorporates a feedthrough term to assign the system's transmission zeros at desired locations in the complex plane, and a feedback term to move the system's poles to appropriate positions in the left-half plane. The second part is a feedback servo loop that allows tracking of the desired trajectory. The controller is implemented on an experimental test-bed. The performance is compared with that of a second controller based on pole placement state feedback.
TL;DR: In this paper, a theoretical analysis of the feedback system in the scanning tunneling microscope (STM) is presented, which includes all the elements involved in the STM loop and the mathematical models for each element of the loop has been used and the problem has been solved using control theory.
Abstract: A theoretical analysis of the feedback system in the scanning tunneling microscope (STM) is presented. The proposed model includes all the elements involved in the STM loop. The knowledge of its behavior allow one to accurately determine the region where the unstable STM operation could affect the measurements, and also to set the optimal working parameters. Each element of the feedback circuitry is analyzed and discussed as well as their mutual interactions. Thus the stability region of a STM has been obtained analytically, using all the possible elements in the feedback loop and without using simplifications or rare models for the system. The mathematical models for each element of the loop has been used and the problem has been solved using control theory. Different working conditions are simulated and analyzed. Some relations for stability conditions, considering the value of each component involved in the feedback loop, are proposed and analyzed. The good agreement between theory and experimentation ...
TL;DR: The small signal state-space model has been used to study the small signal behavior of the power converter for open loop and closed loop operation for parameters like control to output transfer function, audio-susceptibility and output impedance.
Abstract: Discrete state-space modeling of the LCC-type parallel resonant power converter is presented. Using these large signal equations, small signal modeling of the power converter is obtained. Multiple loops have been used for the closed loop operation. State variable feedback control has been integrated with the linear small signal state-space model and the associated control aspects are studied. The small signal state-space model has been used to study the small signal behavior of the power converter for open loop and closed loop operation for parameters like control to output transfer function, audio-susceptibility and output impedance. Key theoretical results have been experimentally verified.
TL;DR: In this article, a timing calibration circuit includes a plurality of variable delay circuits each of which is assigned to one of test signal paths to regulate a phase delay time for a signal passing therethrough.
Abstract: A timing calibration circuit includes a plurality of variable delay circuits each of which is assigned to one of test signal paths to regulate a phase delay time for a signal passing therethrough, a multiplexer for selecting one of the test signal paths whose inputs are connected to outputs of drivers, a signal path whose one end is connected to all of test contactors and the other end is connected to the multiplexer, a counter for measuring phase delay times in a first feedback loop which does not include the signal path and a second feedback loop which includes the signal path with respect to each of the test signal paths. The counter measures a phase delay time for the first feedback loop to determine a reference value so that a phase delay time in the first feedback loop for other test signal paths is adjusted by the variable delay circuit to be equal to the reference value, and the counter measures a phase delay time for the second feedback loop to determine a calibration value for each of the test signal paths and record the calibration value.
TL;DR: In this paper, a triplex control system is proposed to provide automatic compensation for sensor bias failure in one channel while continuing to process all sensor readout signals, where the feedback signal has a bias sense and magnitude that serves to correct the channel output signal so as to drive it towards the average of the channel control signals from each of the channels.
Abstract: A triplex control system provides automatic compensation for a sensor bias failure in one channel while continuing to process all sensor readout signals. The triplex control system includes first through third non-linear feedback channel processors, each being coupled to a respective sensor to receive a readout signal therefrom. Each channel processor comprises a control algorithm module and feedback loop correction circuit coupled together so as to generate a channel output signal in correspondence with a channel control algorithm and a feedback loop correction signal. The respective channel feedback loop correction signal is generated by the feedback loop correction circuit to provide sensor failure compensation; the feedback signal has a bias sense and magnitude that serves to correct the channel output signal so as to drive it towards the average of the channel control signals from each of the channel processors. Each feedback loop correction circuit comprises a residual signal generator that receives the sensor readout signal from each respective sensor and is adapted to generate a signal to provide the bias sense to the feedback loop correction circuit. The control system additionally has an controller output selection module for providing an control system output signal in correspondence with a selected function, such as an average or median value of the respective channel output signals.
TL;DR: In this paper, a transmitter comprises an input terminal for receiving a signal to be amplified, a forward amplification path having a power amplifier output stage and a feedback path used to improve linearity, having two modes of operation: A) during a first mode of operation, i) at least occasionally measuring the DC conditions within the transmitter with the power amplifier disabled and using the results to minimize carrier output from the transmitter.
Abstract: A transmitter comprises an input terminal for receiving a signal to be amplified, a forward amplification path having a power amplifier output stage and a feedback path used to improve linearity, having two modes of operation: A) during a first mode of operation: i) at least occasionally measuring the DC conditions within the transmitter with the power amplifier disabled and using the results to minimize carrier output from the transmitter; ii) at least occasionally measuring the phase shift around the feedback loop required to achieve negative feedback; B) during a second mode of operation, using the measurement of phase shift to ensure negative feedback by applying phase compensation.
TL;DR: It is shown that the partial system—single generator with a controlled loop can exhibit a significantly rich variety of dynamical regimes, including stochastic regimes, in an ensemble of two mutually-coupled generators.
Abstract: In this paper we report the results of analog and numerical modelling of dynamics from a system comprised of two mutually-coupled generators, each of which has a local feedback loop of frequency control. It is shown that the partial system—single generator with a controlled loop can exhibit a significantly rich variety of dynamical regimes, including stochastic regimes. As one of our main results we consider the effect of mutual stochastic synchronization observed in an ensemble of two such generators coupled symmetrically for definite values of the coupling parameter and parameters of generators.
TL;DR: In this article, the output power is controlled by a third control signal (TXCE), which switches off the feedback loop for the period of the information transfer and at other times closes the loop.
Abstract: Some mobile station cellular networks use either amplitude modulation or constant envelope modulation depending on the situation. The pulsed transmitter of the mobile station is switched on and off by a first control signal (TXP) and the output power envelope shaping of the pulse to be transmitted is controlled in the feedback loop by a second control signal (TXC). According to the invention the output power is controlled by a third control signal (TXCE) which in the amplitude modulation case switches off the feedback loop for the period of the information transfer and which at other times closes the feedback loop.
TL;DR: This paper presents a new class D amplifier employing dual feedback loops, namely current and voltage feedback considering complex impedances of the loudspeakers, which provides wide full-power bandwidth and stability at any load with high efficiency.
Abstract: The pulse width modulated class D power amplifier has the highest efficiency among various classes of amplifiers. However the performances, such as bandwidth, distortion and stability are inferior to those of the conventional class A or B. This paper presents a new class D amplifier employing dual feedback loops, namely current and voltage feedback considering complex impedances of the loudspeakers. The novel class D amplifier provides wide full-power bandwidth and stability at any load with high efficiency.
TL;DR: Two closed-loop autotuning methods are developed to provide superior alternatives to tune a proportional-integral-derivative (PID) controller for single-input-single-output systems and are demonstrated to be valid for a wide range of process dynamics and insensitive to measurement noise and disturbances.
Abstract: Two closed-loop autotuning methods are developed to provide superior alternatives to tune a proportional-integral-derivative (PID) controller for single-input-single-output systems. The first method is a closed-loop extension of the Astrom-Hagglund autotuner. A relay is connected in the feedback loop to the PID control system to produce a stable limit cycle. On the basis of the resulting oscillations, the process is identified as a first- or second-order plus time-delay model. The second method is a time domain approach, which identifies the process as a second-order plus time-delay model via an underdamped transient. The identification scheme permits the use of any control mode (P, PI, or PID) and any test input signal (step, pulse, or impulse) applied in setpoint. Simple-to-use correlation formulas based on the identified model are derived to provide optimum PID settings which yield the desired decay ratio, robustness, and minimum integral of the absolute error. With an initial stabilizing controller, the two methods allow the control parameters to be adjusted iteratively to the correct values. The proposed methods are demonstrated to be valid for a wide range of process dynamics and insensitive to measurement noise and disturbances.
TL;DR: In this paper, a controller performance index developed by Desborough and Harris (1992) is proposed as a fault detection technique for the online monitoring of feedback control systems, which can distinguish between process variability due to external sources (e.g., load or setpoint changes) and variabililty due to a significant change in the feedback loop.
Abstract: A controller performance index developed by Desborough and Harris (1992) is proposed as a fault detection technique for the online monitoring of feedback control systems. An important theoretical advantage of this approach is that the performance index can distinguish between process variability due to external sources (e.g., load or setpoint changes) and variabililty due to a significant change in the feedback loop. The feasibility of the new approach is demonstrated via a simulation study for an air duct heating coil.
TL;DR: In an effort to achieve higher throughput, alternative decision feedback loop architectures based on look-ahead computation are evaluated and a hybrid RAM/linear architecture is found to approach 150 Mbps throughput with implementational advantages over both RAM and linear feedback filters.
Abstract: The design and performance of an adaptive RAM-Decision feedback equalizer integrated circuit (RAM-DFE IC) for magnetic recording channels is presented. The 0.8 /spl mu/m BICMOS digital chip has been integrated with discrete analog components in a 54 Mbps read channel. Description of the IC implementation details techniques to reduce latency and outlines tradeoffs between performance and complexity. In an effort to achieve higher throughput, alternative decision feedback loop architectures based on look-ahead computation are evaluated. A hybrid RAM/linear architecture is found to approach 150 Mbps throughput with implementational advantages over both RAM and linear feedback filters. >
TL;DR: In this article, a logical synthesizing device and logical synthesis method capable of generating a net list from a feedback loop added flip-flop excellent in layout efficiency is presented, where the feedback loop is formed in an optimum layout composition in consideration of the setup time and hold time.
Abstract: A logical synthesizing device and logical synthesizing method capable of generating a net list from a feedback loop added flip-flop excellent in layout efficiency. In a cell library, cells of feedback loop added flip-flop are newly registered together with existing various cells. The feedback loop portion of this feedback loop added flip-flop is formed in an optimum layout composition in consideration of the setup time and hold time. A logical synthesizing section, using the cells registered in the cell library, generates a net list for realizing a logical function description, and outputs to a test design section At this time, the feedback loop forming portion in the input and output of the flip-flop generates the net list by using the feedback loop added flip-flop.
TL;DR: In this article, the definition of first-generation and second-generation current conveyors is presented and it is shown how a translation between first and second generation conveyors can be achieved using multiple output conveyors.
Abstract: The definition of both first-generation (CCI) and second-generation (CC11) current conveyors is presented and it is shown how a translation between first- and second-generation conveyors can be achieved using multiple output conveyors. Some basic concepts relating to second-generation CMOS current conveyor design are briefly reviewed and design equations are given for the fundamental properties of the current conveyor implementations. Transistor-level examples of conveyor designs are presented. Then, a modification of the CCIl-to-CCI transformation is shown to yield a low x-input impedance, owing to a local feedback loop, and it is shown how this local feedback loop can also be utilized in CCII circuits by converting a CCI to a CC11. The results are confirmed by simulations using transistor parameters from a commercially-available CMOS process.
TL;DR: RF feedback with Cartesian compensation is proposed as a technique for overcoming problems of linear errors, nonlinear errors, and noise in the feedback loop.
Abstract: The performance of feedback as a distortion reduction technique is highly dependent on the integrity of the feedback path. Any error or noise generated in this path is directly reflected into the output of the amplifier. Cartesian feedback requires a demodulator in the feedback loop and this is a potential source of linear errors, nonlinear errors, and noise. RF feedback with Cartesian compensation is proposed as a technique for overcoming these problems. In addition the RF nature of the input, feedback and error signals makes the system suitable for incorporating into a feedforward system to further improve the linearisation capability. Design equations and simulation results are given for such a system.
TL;DR: This work analyzes the feedback based rate control mechanism (as defined by the ATM Forum) and obtains closed-form (approximate) solutions and design equations that will aid in determining appropriate values for the various control parameters.
Abstract: High speed networks based on the asynchronous transfer mode (ATM) will use the available bit rate (ABR) service to support best effort type service. The ABR service will use an end-to-end adaptive feedback based rate control, where the sources adapt their rates (at the cell level) based on the state of the network. The performance of this control mechanism depends on a number of control parameters, as well as the delay of the feedback loop. We analyze the feedback based rate control mechanism (as defined by the ATM Forum) and obtain closed-form (approximate) solutions. These design equations will aid in determining appropriate values for the various control parameters.
TL;DR: In this paper, a phase modulator, a variable attenuator, a high power amplifier, a directional coupler, a detector, an error amplifier, switch and an analog multiplier form an envelope feedback loop.
Abstract: It is an object of the present invention to provide a transmitter which is inexpensive and small in size and is reduced in power dissipation and besides wherein the output power of a power amplifier can be varied to an arbitrary value. A phase modulator, a variable attenuator, a high power amplifier, a directional coupler, a detector, an error amplifier, a switch and an analog multiplier form an envelope feedback loop. The envelope feedback loop controls an envelope of a modulated wave detected by the detector so that a base band signal and the envelope of the modulated wave may coincide with each other. The circuits mentioned above, a smoothing circuit, another error amplifier, another switch and an adder form an operation point feedback loop. The operation point feedback loop smoothes an error of an output envelope detection signal of the detector and controls so that the smoothed error may be in the minimum.
TL;DR: In this article, a phase-locked loop (PLL) is used to generate a derived clock signal that is frequency-locked to a reference clock signal, which is then compared to an ideal count value associated with the same sampling time period.
Abstract: A digitally controlled phase locked loop generates a derived clock signal that is frequency locked to a reference clock signal. The apparatus is comprised of a microcontroller 104, counter 102, digital to analog converter (DAC) 110 and a voltage controlled crystal oscillator (VCXO) 112 connected in a feedback loop arrangement. A frequency output derived from the VCXO periodically samples at 102 an incoming reference signal. The sampled count value is compared at 106 to an ideal count value associated with the same sampling time period. A microcontroller and software-based algorithm perform the phase comparison and loop filter operations of the phase locked loop (PLL). The microcontroller makes an initial adjustment to the oscillator control signal and calibrates one or more loop gain coefficients for subsequent updates of the control signal. The arrangement includes an active PLL and standby PLL which are synchronized to input reference signals and to each other. In the event of loss of lock or of reference signals, the oscillator 112 may be allowed to free-run or held at its previous frequency value.
TL;DR: In this paper, a ripple cancellation method is proposed to cancel the second harmonic distortion in active power factor correction systems, which involves a modification of the feedforward and feedback filters and is independent of the power level.
Abstract: A major cause of input current distortion in active power factor correction systems is the second harmonic components. Propagation of the ripple components in the feedback and feedforward paths and their interaction in the current shaping controller are examined. Based on this analysis, a ripple cancellation method is proposed. It entails a modification of the feedforward and feedback filters and is independent of the power level. The analytical results derived in this study are confirmed by simulation. >
TL;DR: In this paper, a decision feedback equalization circuit which can be operated at high speed with a low cost as well as a high-speed digital data communication system and a high speed digital data recording system using the equalization circuits is disclosed.
Abstract: A decision feedback equalization circuit which can be operated at a high speed with a low cost as well as a high-speed digital data communication system and a high-speed digital data recording system using the equalization circuit are disclosed. The decision feedback equalization circuit has data memories which correspond to the number of available values in decision result and in which feedback signals corresponding to all the next decision results are previously prepared as candidates so that a suitable one of the feedback signal candidates is selected and fed back based on the obtained decision result, thus realizing high-speed operation of a feedback loop.
TL;DR: An inertial feedback loop is added to each controller of three-phase current-controlled inverters with hysteretic current controllers, affecting operating characteristics of the inverter by enforcing a switching pattern of low dependence on the load.
Abstract: A concept of the so-called inner feedback in three-phase current-controlled inverters with hysteretic current controllers is introduced. Stability of the inverter at various frequencies under two different applied loads have been studied. An inertial feedback loop is added to each controller. This modification affects operating characteristics of the inverter by enforcing a switching pattern of low dependence on the load, resulting in significantly improved quality of the output current. >
TL;DR: In this paper, the response of various feedback loops to these errors is measured and analyzed in an attempt to improve performance at the Stanford Linear Collider (SLC) in order to improve the performance.
Abstract: Many feedback loops are used at the Stanford Linear Collider (SLC) to control the orbit and energy of particle beams. Problems with corrector magnet slew rates, actuator calibrations, and computation of the beam transport matrix between loops have resulted in operation of many SLC feedback loops at lower than design gain. The response of various feedback loops to these errors is measured and analyzed in an attempt to improve performance.
TL;DR: In this article, the output power is controlled by a third control signal (TXCE), which switches off the feedback loop for the period of the information transfer and at other times closes the loop.
Abstract: Some mobile station cellular networks use either amplitude modulation or constant envelope modulation depending on the situation. The pulsed transmitter of the mobile station is switched on and off by a first control signal (TXP) and the output power envelope shaping of the pulse to be transmitted is controlled in the feedback loop by a second control signal (TXC). According to the invention the output power is controlled by a third control signal (TXCE) which in the amplitude modulation case switches off the feedback loop for the period of the information transfer and which at other times closes the feedback loop.