Patent
Three dimensional semiconductor device
Sung-Min Hwang,Han-soo Kim,Woon-kyung Lee,Wonseok Cho +3 more
- 05 Aug 2016
90
TL;DR: A 3D semiconductor device includes a conductive plate defining four sides and four recesses formed in the four sides, respectively as mentioned in this paper, and a plurality of conductive wires electrically connect the semiconductor die to the conductive leads.
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Abstract: A 3D semiconductor device includes a conductive plate defining four sides and four recesses formed in the four sides, respectively. The conductive plate has first and second surfaces opposite to each other. A plurality of conductive leads are located in the recesses, respectively, and the conductive leads have first and second surfaces opposite to each other. A semiconductor die is attached onto the central area of the conductive plate. A plurality of conductive wires electrically connects the semiconductor die to the conductive leads. An encapsulant encloses, as in a capsule, the conductive plate, the conductive leads, the semiconductor die, and the conductive wires in such a manner that the first and second surfaces of the conductive plate and the first and second surfaces of the conductive leads are exposed to the outside.
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Citations
Patent
Vertical-type semiconductor device
Young-Hoo Kim,Hyo-san Lee,Bae Sang-Won,Bo-Un Yoon,Kun-tack Lee +4 more
- 31 Aug 2010
TL;DR: In this article, a single-crystalline semiconductor pattern with a linear shape is provided on the substrate to make contact with both sidewalls of the insulation layer pattern, the insulation interlayer patterns having a pillar shape that extends in a vertical direction relative to the substrate.
75
Patent
Vertical memory devices
Chang-Min Choi,Ju-Young Lim,Su-Jin Ahn +2 more
- 04 May 2017
TL;DR: In this paper, a vertical memory device includes a substrate, a plurality of channels extending in a first direction substantially vertical to a top surface of the substrate, gate lines surrounding a predetermined number of channels from among the channels.
75
Patent
Semiconductor device having contact pads
Ki Hong Lee,Seung Ho Pyi,Ji Yeon Baek +2 more
- 04 Apr 2016
TL;DR: In this article, a semiconductor device includes a stacked structure having first conductive layers stacked stepwise and first insulating layers interposed between them, wherein undercuts are formed under the first conductivity layers and a liner layer formed on the contact pads and filling the undercuts.
47
Patent
Vertical type memory device
Kwang-Soo Seol,Seong-Soon Cho +1 more
- 15 Mar 2013
TL;DR: In this article, a semiconductor device comprising a plurality of memory cell strings; a bitline; and an interconnection coupling at least two of the memory cell string to the bitline is described.
38
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Vertical memory devices
Chang-Hyun Lee
- 05 Jan 2016
TL;DR: In this paper, a vertical memory device includes a low resistance layer on a lower insulation layer, a channel layer on the low-resistance layer, vertical channels on the channel layer, and a plurality of gate lines.
35
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Kanaan Kano
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Patent
Non-volatile semiconductor storage device and method of manufacturing the same
Yoshiaki Fukuzumi,Ryota Katsumata,Masaru Kidoh,Masaru Kito,Hiroyasu Tanaka,Yosuke Komori,Megumi Ishiduki,Hideaki Aochi +7 more
- 09 Sep 2009
TL;DR: In this paper, a nonvolatile semiconductor storage device has a plurality of memory strings to each of which an electrically rewritable memory cells are connected in series, each of the memory strings includes first semiconductor layers each having a pair of columnar portions extending in a vertical direction with respect to a substrate.
728
Patent
Nonvolatile semiconductor memory device and manufacturing method thereof
Kato Juri
- 27 Sep 2006
TL;DR: A nonvolatile semiconductor memory device includes a gate electrode provided on a channel region of a semiconductor layer and a floating gate provided on the back side of the semiconductor layers with a first insulating layer interposed there between as discussed by the authors.
641
Patent
Three dimensional semiconductor memory devices and methods of fabricating the same
Kwang Soo Seol,Chanjin Park,Ki-Hyun Hwang,Han-mei Choi,Sunghoi Hur,Wan Sik Hwang,Toshiro Nakanishi,Kwangmin Park,Juyul Lee +8 more
- 12 Mar 2013
TL;DR: In this article, the three-dimensional semiconductor memory devices include an electrode structure with sequentially-stacked electrodes disposed on a substrate, semiconductor patterns penetrating the electrode structure, and memory elements including a first pattern and a second pattern interposed between the semiconductor pattern and the electrode structures.
526
Patent
Nonvolatile memory device, operating method thereof and memory system including the same
Chi Weon Yoon,Dong-Hyuk Chae,Jae-Woo Park,Sang-Wan Nam +3 more
- 16 Feb 2011
TL;DR: In this article, the erasing operation to memory cells associated with a plurality of string selection lines (SSLs), the memory cells associating with the plurality of SSLs constituting a memory block, was verified.
497