Solid-state imaging device and method for manufacturing the same, and electronic apparatus

TL;DR: In this article, the authors proposed a solution to perform potential control over a channel region of each charge readout transistor of a CMOS solid-state imaging device while making a pixel size very small by employing vertical gate electrode for a gate electrode of the charge read-out transistor.

Abstract: PROBLEM TO BE SOLVED: To surely perform potential control over a channel region of each charge readout transistor of a CMOS solid-state imaging device while making a pixel size very small by employing vertical constitution for a gate electrode of the charge readout transistor. SOLUTION: The solid-state imaging device includes a substrate 20, photodiodes PD1 and PD2 buried in the substrate 20, a vertical gate electrode 26 of a charge readout transistor Tr1 buried along the depth of the substrate so as to read signal charge out of the photodiodes PD1 and PD2, and planar gate electrodes 31 and 33 of other transistors Tr2 and Tr3 formed of an electrode material different from that of the vertical type readout gate electrode 26. COPYRIGHT: (C)2010,JPO&INPIT