Patent
Remote maintenance system for fpga
Yuuichi Ikumichi,Junichi Takai,裕一 生路,純一 高井 +3 more
- 15 Mar 2004
11
TL;DR: In this paper, the authors propose a rewritable EEPROM for remote writing of update data into an FPGA, where a communication device receives the update data of the FPGAs for remote maintenance.
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Abstract: PROBLEM TO BE SOLVED: To facilitate remote writing of update data into a FPGA. SOLUTION: In a device connecting a FPGA 4 for downloading data from a data storage device 6 with a LAN communication device 5 through a local bus, the data storage device 6 is served as a rewritable EEPROM for remotely writing the update data into the FPGA, and a communication device receives the update data of the FPGA for remote maintenance to write the update data into the EEPROM. It includes a configuration comprising a sequencer for writing the update data into the data storage memory and a buffer for disabling the input/output of the FPGA at the data writing, a configuration comprising a LAN communication device dedicated for maintenance for receiving the update data of the FPGA and the sequencer for writing the data, and a configuration provided with a switching apparatus for switching the reception data of the communication device to the sequencer side at the remote maintenance. COPYRIGHT: (C)2005,JPO&NCIPI
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Citations
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Thomas D. Needham,Andrew R. Ranck +1 more
- 12 Jul 2012
TL;DR: In this paper, direct memory access (DMA) is used to initialize a programmable logic device (PLD) in a programming mode, where the PLD interface includes a data buffer and pacing logic.
1