Patent
Neural network memory
Mattia Boniardi,Innocenzo Tortorelli +1 more
- 03 Jul 2019
TL;DR: In this article, a neural memory unit controller can be configured to initiate a sleep interval, during which no pulses are applied to the memory cells, to effectuate voltage drifts in the changed respective threshold voltages of memory cells from a set state toward the voltage associated with the reset state.
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Abstract: In an example, an apparatus can include an array of memory cells and a neural memory unit controller coupled to the array of memory cells and configured to assert respective voltage pulses during a first training interval to memory cells of the array to change respective threshold voltages of the memory cells from voltages associated with a reset state to effectuate respective synaptic weight changes. The neural memory unit controller can be configured to initiate a sleep interval, during which no pulses are applied to the memory cells, to effectuate respective voltage drifts in the changed respective threshold voltages of the memory cells from a voltage associated with a set state toward the voltage associated with the reset state, and determine an output of the memory cells responsive to the respective voltage drifts in the changed respective threshold voltages after the sleep interval.
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References
Brain-inspired computing with resistive switching memory (RRAM): Devices, synapses and neural networks
TL;DR: First, RRAM devices with improved window and reliability thanks to SiO x dielectric layer are discussed, then, the application of RRAM in neuromorphic computing are addressed, presenting hybrid synapses capable of spike-timing dependent plasticity (STDP).
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Neuromorphic Learning and Recognition With One-Transistor-One-Resistor Synapses and Bistable Metal Oxide RRAM
Stefano Ambrogio,Simone Balatti,Valerio Milo,Roberto Carboni,Zhongqiang Wang,Alessandro Calderoni,Nirmal Ramaswamy,Daniele Ielmini +7 more
TL;DR: A new synaptic circuit consisting of a one-transistor/one-resistor structure, where the resistive element is a HfO2 RRAM with bipolar switching, and the spike-timing-dependent plasticity is demonstrated in both the deterministic and stochastic regimes of the RRAM.
Unsupervised Learning by Spike Timing Dependent Plasticity in Phase Change Memory (PCM) Synapses.
Stefano Ambrogio,Nicola Ciocchini,Mario Laudato,Valerio Milo,Agostino Pirovano,Paolo Fantini,Daniele Ielmini +6 more
TL;DR: The proposed scheme provides a feasible low-power solution for on-line unsupervised machine learning in smart reconfigurable sensors and supports the applicability of the 1T1R synapse for learning and recognition of visual patterns by simulations of fully connected neuromorphic networks with 2 or 3 layers with high recognition efficiency.
Recent Advances in Memristive Materials for Artificial Synapses
TL;DR: The most recent developments in memristor‐based artificial synapses are introduced with their excellent synaptic behaviors accompanied with detailed explanation of their working mechanisms to be a guide to rational materials design for the artificial synapse of neuromorphic computing.
211
Patent
Thin film memory matrix using amorphous and high resistive layers
Anilkumar P. Thakoor,John Lambe,Alexander Moopen +2 more
- 29 Apr 1986
TL;DR: In this article, the memory cells in a memory matrix are provided by a thin film of amorphous semiconductor material overlayed by resistive material, and each cell may be fabricated in the channel of an MIS field effect transistor with a separate common gate over each section to enable the memory matrix to be selectively blanked in sections during storing or reading out of data.
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