Patent
Method and system for bus switching data transfers
David R. Brown,Christopher Hume Lamb +1 more
- 22 May 1998
43
TL;DR: In this article, a data transfer system for transparent direct communication between the devices and the computer system is presented. But the system is based on a switch having a plurality of ports and each of the ports is adapted to accept data from its respective device and transmit data to its own device in a bi-directional manner.
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Abstract: In a computer system having a plurality of peripheral devices, a data transfer system for implementing transparent direct communication between the devices and the computer system. The system of the present invention includes a switch having a plurality of ports. Each of the plurality of ports is adapted to couple to a respective one of a plurality of devices. Each of the plurality of ports is further adapted to accept data from its respective device and transmit data to its respective device in a bi-directional manner. The switch communicatively couples a first pair of the plurality of ports to enable communication between their respective devices and communicatively couples a second pair of the plurality of ports to enable communication between their respective devices such that communication between the first pair of ports and communication between the second pair of ports occurs simultaneously and independently, thereby implementing efficient switched data transfers between the respective devices and greatly increasing the total data transfer bandwidth of the computer system.
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Citations
Patent
Transfer ready frame reordering
Rodney N. Mullendore,Stuart F. Oberman,Anil Mehta,Keith Schakel,Kamran Malik +4 more
- 24 Jul 2002
TL;DR: In this paper, a system and method for reordering received frames to ensure that transfer ready (XFER_RDY) frames among the received frames are handled at higher priority, and thus with lower latency, than other frames.
86
Patent
Integrated communication systems for exchanging data and information between networks
Mark E. Tofano
- 14 Jun 2002
TL;DR: In this article, integrated communication systems enabling data and information exchanges between various networks and various network formats are provided. But the authors do not specify the underlying architecture of the communication system.
71
Patent
Modular input/output controller capable of routing packets over busses operating at different speeds
Steven Miller
- 29 Sep 1999
TL;DR: In this paper, a modular, scalable high-bandwidth computer architecture is presented, where a single integrated router/bridge ASIC defines a family of peripheral controllers that accept high-speed packet switched data, either for routing to other, identical controllers, or for routing on-board PCI buses, depending on the number of ASICs employed and their selectable configuration.
69
Patent
Split transaction protocol for a bus system
John I. Garney,John S. Howard +1 more
- 30 Dec 2010
TL;DR: In this article, the authors propose a method of and apparatus for communicating between a host and an agent, which includes the step of performing a first transaction between a controller and a hub, and then a second transaction between the controller and the hub.
46
Patent
System having configurable interfaces for flexible system configurations
Barton J. Sano
- 11 Oct 2002
TL;DR: In this article, a switch interface circuit is configured to interface the plurality of memories, a plurality of systems, and switch interface circuits to a switch fabric to enforce coherency for at least some accesses.
45
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Patent
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Khaldoun Alzien
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TL;DR: In this paper, a PCI repeater coupled between a primary bus and a secondary bus includes logic to allow downstream and upstream bursting across the repeater, which can echo transactions in either an upstream or downstream direction.
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Scott Swanstrom
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TL;DR: In this paper, an improved DMA controller for performing DMA transfers between a peripheral device and system memory and receiving and servicing interrupts generated by the peripheral device is presented, which renders the CPU more responsive to real-time events by servicing a portion of the peripheral interrupts.
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Patent
First arbiter coupled to a first bus receiving requests from devices coupled to a second bus and controlled by a second arbiter on said second bus
Robert A. Lester,Jeff W. Wolford +1 more
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TL;DR: In this paper, the authors proposed an improved arbitration scheme including multiple arbiters for arbitrating access to a PCI bus and an ISA bus, where the PCI arbiter utilizes a modified LRU arbitration scheme.
53
Patent
Method and apparatus for sharing hardward resources in a computer system
Suresh Marisetty,Krishnan Ravichandran +1 more
- 15 Feb 1996
TL;DR: In this paper, a method and apparatus for sharing a logic block between multiple peripheral/input/output I/O devices is presented, where a first interrupt is generated in response to a request from one of the devices, and a second interrupt is recognized before the first interrupt, such that the second interruption is handled first and causes the logic block to be configured for the requested device.
46
Patent
Method and apparatus for arbitration and access to a shared bus
Kevin M. Christiansen,Mark A. Stubbs,Bruce Eckstein +2 more
- 08 May 1995
TL;DR: In this paper, a computer system which arbitrates control of a shared bus among plural devices included in the computer system is presented, where at least one of the devices is afforded a higher priority than the remaining devices, yet none of remaining devices are effectively denied system bus access or control for extended periods of time.
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