Patent
Frequency acquisition system
J.G. Kenney,Lawrence M. Devito +1 more
- 09 Apr 2003
32
TL;DR: In this article, a frequency acquisition system for a tunable oscillator is provided that generally includes a frequency-locked loop circuit including a detector system, responsive to the frequency of an output signal of a T oscillator and the reference signal, providing a digital output signal representative of a difference in frequency between the output signal and the target signal.
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Abstract: A frequency acquisition system for a tunable oscillator is provided that generally includes a frequency-locked loop circuit including a detector system, responsive to the frequency of an output signal of a tunable oscillator and the frequency of a reference signal, to provide a digital output signal representative of a difference in frequency between the output signal and the reference signal, a register circuit for storing a value representative of the present control state of the tunable oscillator; and an accumulator circuit responsive to a value representative of the present control state of the tunable oscillator and to the digital output signal for providing an updated value for adjusting the frequency of the tunable oscillator towards the frequency of the reference signal.
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Citations
Patent
Clock data recovery circuitry and phase locked loop circuitry with dynamically adjustable bandwidths
Kazi Asaduzzaman,Wilson Wong,Sergey Shumarayev +2 more
- 26 Sep 2003
TL;DR: In this paper, a clock data recovery (CDR) circuitry or phase-locked loop (PLL) circuitry can be provided with a dynamically adjustable bandwidth and control signals can be used to dynamically adjust the bandwidth of the CDR circuitry or PLL circuitry.
18
Patent
Thermometer code generator, and frequency-locked loop including the same
In-Ho Lee,Seok-Soo Yoon,Young-Ho Kwak,Ki-Hong Kim,Chulwoo Kim +4 more
- 23 Aug 2007
TL;DR: A thermometer code generator includes n bit storing stages coupled to each other, where n is an integer greater than 1, and the n-bit storing stages store a temperature code, and are adapted to increase the stored temperature code by 1 in synchronization with a clock signal when an up signal is active, decrease the temperature code when a down signal is inactive as discussed by the authors.
16
Patent
Clock and data recovery (cdr) architecture and phase detector thereof
Soon-Jyh Chang,Yen Long Lee,Chung-Ming Huang +2 more
- 27 Oct 2011
TL;DR: In this article, a clock and data recovery (CDR) architecture consisting of a frequency detector, a phase detector and a phase charge pump circuit is presented, which includes four AND gates to receive and evaluate the intermediate signals generated by the frequency detector and accordingly generate a phase control signal.
16
Patent
Integrated circuit device, electronic device and method therefor
Yen-Horng Chen,Augusto Marques,Caiyi Wang +2 more
- 14 Oct 2011
TL;DR: In this article, an integrated circuit device includes at least one controllable oscillator including a first control port and at least another control port, at least a frequency control module including an output arranged to provide a frequency controller signal, and an integrator component arranged to output an integrated difference signal.
14
Patent
Cdr circuit and semiconductor device
Mitsunori Takanashi,Ryo Endo +1 more
- 09 Jul 2015
TL;DR: In this paper, a clock data recovery (CDR) circuit is provided with a circuit that updates a locked oscillation frequency, with a small loop gain, after phase lock based on a phase-locked loop circuit for a frequency-locked frequency is completed by either during a phase lock operation or during a non-phase lock operation.
13
References
Patent
Phase detector for phase-locked loop clock recovery system
Lawrence M. Devito
- 07 May 1990
TL;DR: In this article, a phase detector circuit for a phase-locked loop clock recovery system detects the phase difference between an information signal and a clock signal and produces a phase error signal representative of the phase differences.
58
Patent
Digital controlled oscillator and method thereof
Lanny L. Parker,Ahmad H. Atriss,Benjamin C. Peterson +2 more
- 06 Jan 1995
TL;DR: In this paper, a digital controlled oscillator (DCO) is phase locked to a reference clock, and a control circuit (12) generates a reset signal from the reference clock that sets the edges of the oscillator signal in line with an edge of the PCO.
49
Patent
Phase locked loop ciruit for a liquid crystal display
Seiichi Idei,Takuya Ishikawa +1 more
- 26 Nov 1996
TL;DR: In this article, a single voltage controlled oscillator for a PLL circuit has two control loops: a main loop maintaining low noise ration, while a wide frequency capture range is ensured by a sub-loop controlled by a one-chip microcomputer.
32
Patent
Tunable oscillator with leakage compensation
Lawrence M. Devito
- 22 May 2001
TL;DR: A tunable oscillator for producing an output signal includes an input for receiving a first voltage that is a function of the output signal, a controllable oscillators, and a voltage element that produces a second voltage and has a first leak current as mentioned in this paper.
15
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