FPGA safe operation system and method

TL;DR: In this paper, an FPGA safe operation system and method is proposed, which consists of transmitting FPGAs program data generated through compiling to an ARM module, and the ARM module decoding the ciphertext data through the encryption and decryption module.

Abstract: The invention provides an FPGA safe operation system and method. The method comprises: transmitting FPGA program data generated through compiling to an ARM module; the ARM module receiving FPGA program data, carrying out encryption processing through the encryption and decryption module to obtain corresponding ciphertext data, and storing the ciphertext data in the Flash memory; when the FPGA chipis to be operated, the ARM module readingthe ciphertext data from the Flash memory, and decrypting the ciphertext data through the encryption and decryption module to obtain FPGA program data, and then transmitting the FPGA program data to the FPGA chip; when the FPGA chip receives the FPGA program data, the FPGA chip authenticating with the first authentication module of the ARM module through the second authentication module; and when the authentication is successful, the FPGA chip executing the task according to the FPGA program data, and when the authentication is not successful, the FPGAchip stopping executing the task. According to the system and the method, the safe storage of the FPGA program data can be realized, and the safe operation of the FPGA chip can be ensured.