Patent
Efficient scissoring for graphics application
Guofang Jiao,Angus M. Dorbie +1 more
- 20 Nov 2007
15
TL;DR: Scissoring for any number of scissoring regions is performed in a sequential order by drawing one Scissoring region at a time on a drawing surface and updating scissor values for pixels within each scissored region.
read more
Abstract: Scissoring for any number of scissoring regions is performed in a sequential order by drawing one scissoring region at a time on a drawing surface and updating scissor values for pixels within each scissoring region. A scissor value for a pixel may indicate the number of scissoring regions covering the pixel and may be incremented for each scissoring region covering the pixel. A scissor value for a pixel may also be a bitmap, and a bit for a scissoring region may be set to one if the pixel is within the scissoring region. Pixels within a region of interest are passed and rendered, and pixels outside of the region are discarded. This region may be defined by a reference value, which may be set to (a) one for the union of all scissoring regions, for a scissoring UNION operation, or (b) larger than one for the intersection of multiple (e.g., all) scissoring regions, for a scissoring AND operation.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
Citations
Patent
System, method, and computer program product for inputting modified coverage data into a pixel shader
Yury Uralsky,Henry Packard Moreton +1 more
- 01 Nov 2012
TL;DR: In this paper, a system, method, and computer program product are provided for inputting modified coverage data into a pixel shader, where coverage data modified by a depth/stencil test is input into the pixel shader.
49
Patent
Target independent rasterization
Shai Hinitz,Amar Patel,Charles N. Boyd,Blake D. Pelton +3 more
- 06 Oct 2010
TL;DR: In this article, the target is the memory allocated for a rendered image within a graphics pipeline, and the sampling rate of the rasterization process is specified independently from the memory allocation for the rendered image.
12
Patent
Tessellation of two-dimensional curves using a graphics pipeline
Anthony John Rolls Hodsdon,Blake D. Pelton +1 more
- 30 Apr 2013
TL;DR: In this article, the authors present methods, systems, and computer-storage media for efficiently tessellating two dimensional (2D) curves using a graphics pipeline running on a graphics processing unit (GPU).
7
Patent
Bounding region accumulation for graphics rendering
Edward A. Hutchins,Christopher D. S. Donham,Gary C. King,Michael J. M. Toksvig,Mark J. Kilgard +4 more
- 19 Dec 2006
TL;DR: In this paper, a method for bounding region accumulation for graphics rendering is presented, which includes receiving a plurality of graphics primitives for rasterization in a raster stage of a graphics processor.
6
Patent
Graphic system comprising a fragment graphic module and relative rendering method
Mirko Falchetto
- 27 Dec 2007
TL;DR: In this article, a graphic system having a central processing unit, a system memory coupled to the central processing units, a display unit provided with a corresponding screen, and a graphic module coupled to and controlled by the center processing unit to render an image on the screen of the display unit is described.
5
References
Patent
Safe general purpose virtual machine computing system
Robert S. Wahbe,Steven E. Lucco,Christopher W. Fraser,Vance P. Morrison +3 more
- 18 Jun 1997
TL;DR: A safe general purpose virtual machine computing system (SVM) as mentioned in this paper is a general purpose memory protection model that is hardware architecture and programming language independent, which is software based to facilitate operation on hardware architectures that otherwise would prevent the exchange and successful execution of mobile code programs.
147
Improving Shadows and Reflections via the Stencil Buffer
Mark J. Kilgard
- 01 Jan 1999
TL;DR: For too many game developers, the above statement sums up their approach to 3D hardwareacceleration: a game programmer might turn on some fog and maybe throw in some transparency, but that’s often the limit.
Patent
Call and stack mechanism for procedures executing in different rings
Marc Appell,Jean-Louis Bogaert,Claude Massuard,John J. Bradley,Benjamin S. Franklin +4 more
- 24 Nov 1976
TL;DR: A stack is a segment of memory and comprises a number of contiguous portions, known as stack-frames, which are accessed in last in, first out LIFO fashion as discussed by the authors.
68
Patent
Variable masking for segmented memory
John L Curley,Wallace A Martland +1 more
- 05 Oct 1972
TL;DR: In this paper, a variable masking technique and apparatus for simultaneously accessing under program control a variable number of bytes b of information stored in groups of i bytes per group in any of n modules of a storage device that is capable of operating in any m storage modes.
58
Patent
Defect tolerant memory
David H. Spencer,Marvin E. Steiner,Donald H. Lang +2 more
- 04 Dec 1980
TL;DR: In this article, a defect tolerant memory for a computer system is proposed, which consists of a main memory, a redundant memory and a mask memory, each of which has multiple sub-memory units which use a randomness technique to store the addresses of defects in main memory.
58
Related Papers (2)
Kezuka Emiko
- 12 Jan 1990
Kazuya Takahashi
- 01 Sep 2000