Patent
Data processing method, and relevant devices
Yong Wang,Xiaoming Shi,Gang Li,Zhufa Shao +3 more
- 31 Jul 2013
TL;DR: In this paper, a data processing method for reducing system power consumption is described, which includes sampling on an analog signal to obtain an analog sample value; performing analog-to-digital conversion on the analog signal value to obtain a digital signal; dividing bits forming the digital signal into at least two bit groups; and turning off output of bits in at least one bit group if a preset turnoff condition is satisfied.
read more
Abstract: A data processing method, a data processing system, and relevant devices are provided, which are used to reduce system power consumption. The method in embodiments of the present invention includes: performing sampling on an analog signal to obtain an analog sample value; performing analog-to-digital conversion on the analog sample value to obtain a digital signal; dividing bits forming the digital signal into at least two bit groups; and turning off output of bits in at least one bit group if a preset turnoff condition is satisfied. A data processing system and relevant devices are further provided.
read more
Chat with Paper
AI Agents for this Paper
Find similar papers on Google Scholar, PubMed and Arxiv
Write a critical review of this paper
Analyze citations of this paper to find unaddressed research gaps
References
Patent
Data processing method, data processing system and related equipment
Yong Wang,Xiaoming Shi,Gang Li,Zhufa Shao +3 more
- 31 Aug 2011
TL;DR: In this article, a data processing method, data processing system and related equipment, which can be used for reducing system consumption, is presented, which is used to reduce system consumption by sampling an analogue signal to obtain an analogue sampling value.
3
Patent
Method for accessing memory
Chun-Hsiung Hung,Wen-Chiao Ho,Kuen-Long Chang +2 more
- 06 Jun 2007
TL;DR: In this article, a method for accessing memory includes the following steps: Firstly, threshold voltages of the storage are defined into 2n level respectively, wherein each of the 2n levels corresponds to a storage status of n bits, and most significant bits of storage statuses which level 0 to level 2n/2−1 correspond to are different from most significant bit of storage status which level 2 n/2 to level 1 correspond to.
2
Related Papers (5)
Yong Wang,Xiaoming Shi,Gang Li,Zhufa Shao +3 more
- 21 Mar 2018
Zhihui Zheng,Zhengdi Tan +1 more
- 26 Sep 2012
Katsuhiro Wada,克博 和田 +1 more
- 10 Aug 2009