Patent
Bus controller for digital computer system
Alan J. Deerfield,Nissen Stanley Mark +1 more
- 26 Oct 1973
44
TL;DR: In this paper, an arrangement for controlling transmission of blocks of information to and from a plurality of major components of a digital computer system interconnected by common buses is presented. But it does not address the problem of failure detection.
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Abstract: An arrangement is shown for controlling transmission of blocks of information to and from a plurality of major components of a digital computer system interconnected by common buses. The disclosed arrangement operates so that any component of the system may normally seize, on a nonpriority basis, one of the buses at the beginning of any time slot defined by two successive clock pulses generated by a single source and applied to all components simultaneously; however, if a special instruction is encountered during execution of a program, any component may retain a bus for more than one time slot. The disclosed arrangement also permits error checking of transmitted information from a given major component without interfering with transmission from any other major component and automatically causes retransmission of any block of information found to be improperly transmitted originally. Still further, the disclosed arrangement permits buses to be dedicated during execution of a program or, if desired, any complete major component to be replaced without affecting any other major component.
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Citations
Patent
Processor element having a plurality of CPUs for use in a multiple processor system
Masatsugu Kametani
- 30 May 1995
TL;DR: A processor for constructing a single processor system or multiprocessor system comprises, within a base processor element constituting the processor, two CPU with associated local memories, a dual-port RAM accessible from said CPUs, and a common bus switch circuit for connecting any one of said CPUs to a shared bus shared by said CPUs.
12
Patent
Multiple-processor digital communication system
TL;DR: In this paper, a digital communication system is disclosed for communicating among two central consoles and a plurality of local controllers, such as may be used in a radiation and monitoring system and the like.
10
Patent
Apparatus to execute DMA transfer between computing devices using a block move instruction
Anthony K. Fung,Roger G. Mintzlaff +1 more
- 26 Sep 1979
TL;DR: In this article, a method and apparatus for using a "block move" instruction in a microprocessor to execute the direct memory access (DMA) data transfer function between a micro processor and a minicomputer is described.
9
Patent
Multiple-processor digital communication system
Union D C
- 28 Sep 1978
TL;DR: In this article, a digital communication system is disclosed for communicating among two central consoles and a plurality of local controllers, such as may be used in a radiation and monitoring system and the like.
9
Microprogram controlled microprocessor having a plurality of internal buses and including transfer register designation system
TL;DR: A microprogram transfer register designation system for a microprogram controlled microprocessor which has a plurality of internal data buses such that there are previously prepared some number of source registers each designating one source register for each of the internal buses.
8
References
Patent
Expandable computer processor and communication system
A Collins
- 30 Oct 1972
TL;DR: In this article, the authors describe a communication and computation system where the processors communicate with each other and with other devices via a loop of continuously circulating data, which is comprised of channels which are time multiplexed on a bit basis in a repeating sequence.
42
Patent
Serial loop data transmission system
Roy C. Dixon,Lynn Parker West,Larry Joseph Hash,James Donovan Markov +3 more
- 27 Apr 1972
TL;DR: In this article, the state indicia of the state of the slot is reset to a different value at the receiving terminal if the receiving node has no data to send, and the reset state is available to subsequent terminals for the transmission of data.
29
Patent
Thin a definite time position multichannel transmission system using clock pulses each occurring wi
M Mizote
- 01 Dec 1971
TL;DR: In this article, a multichannel transmission system comprising a generator for supplying to all the transmitters and receivers with a reference signal consisting of a plurality of clock pulse combined with a periodic sequential pulse signal is presented.
21
Patent
Loop communications system
Frisone John Batista
- 14 Dec 1971
TL;DR: In this article, a communications system including a central station connected in a series loop with a plurality of remote stations and in which under control of said central station, the remote stations in the order of their physical position transmit data to the central station is described.
20
Patent
Multichannel transmission system using clock pulses each occurring within a definite time position
Mizote M
- 04 Sep 1973
TL;DR: In this paper, a multichannel transmission system comprising a generator for supplying to all the transmitters and receivers with a reference signal consisting of a plurality of clock pulse combined with a periodic sequential pulse signal is presented.
18