A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber with an ion shower grid that divides the chamber into an upper ion generation region and a lower process region, the ion shower grid having plural elongate orifices oriented in a non-parallel direction relative to a surface plane of the ion shower grid.

Plasma immersion ion implantation reactor having an ion shower grid

The embodiments disclosed herein pertain to improved methods and apparatus for etching a semiconductor substrate. A plasma grid assembly is positioned in a reaction chamber to divide the chamber into upper and lower sub-chambers. The plasma grid assembly may include one or more plasma grids having slots of a particular aspect ratio, which allow certain species to pass through from the upper sub-chamber to the lower sub-chamber. Where multiple plasma grids are used, one or more of the grids may be movable, allowing for tenability of the plasma conditions in at least the lower sub-chamber. In some cases, an electron-ion plasma is generated in the upper sub-chamber. Electrons that make it through the grid to the lower sub-chamber are cooled as they pass through. In some cases, this results in an ion-ion plasma in the lower sub-chamber.

Internal plasma grid for semiconductor fabrication

A plasma immersion ion implantation process for implanting a selected species at a desired ion implantation depth profile in a workpiece is carried out in a reactor chamber having a set of plural parallel ion shower grids that divide the chamber into an upper ion generation region and a lower process region, each of the ion shower grids having plural orifices in mutual registration from grid to grid, the plural orifices oriented in a non-parallel direction relative to a surface plane of the respective ion shower grid. The process includes placing a workpiece in the process region, the workpiece having a workpiece surface generally facing the surface plane of the closest one of the plural ion shower grids, and furnishing the selected species into the ion generation region. The process further includes evacuating the process region, and applying plasma source power to generate a plasma of the selected species in the ion generation region. The process also includes applying successive grid potentials to successive ones of the grids and applying a bias potential to the workpiece. The combination of the grid and bias potentials corresponds to the desired ion implantation depth profile in the workpiece.

Plasma immersion ion implantation reactor having multiple ion shower grids

Embodiments described herein generally relate to components for a semiconductor processing chamber, a process kit for a semiconductor processing chamber, and a semiconductor processing chamber having a process kit. In one embodiment a lower shield for encircling a sputtering target and a substrate support is provided. The lower shield comprises a cylindrical outer band having a first diameter dimensioned to encircle the sputtering surface of the sputtering target and the substrate support, the cylindrical band comprising a top wall that surrounds a sputtering surface of a sputtering target and a bottom wall that surrounds the substrate support, a support ledge comprising a resting surface and extending radially outward from the cylindrical outer band, a base plate extending radially inward from the bottom wall of the cylindrical band, and a cylindrical inner band coupled with the base plate and partially surrounding a peripheral edge of the substrate support.

Wafer processing deposition shielding components

The embodiments herein generally deal with semiconductor processing methods and apparatus. More specifically, the embodiments relate to methods and apparatus for etching a semiconductor substrate. A partially fabricated semiconductor substrate is provided in a reaction chamber. The reaction chamber is divided into an upper sub-chamber and a lower sub-chamber by a grid assembly. Plasma is generated in the upper sub-chamber, and the substrate is positioned in the lower sub-chamber. The grid assembly includes at least two grids, each of which is negatively biased, and each of which includes perforations which allow certain species to pass through. The uppermost grid is negatively biased in order to repel electrons. The lowermost grid is biased further negative (compared to the uppermost grid) in order to accelerate positive ions from the upper to the lower sub-chamber. Etching gas is supplied directly to the lower sub-chamber. The etching gas and ions react with the surface of the substrate to etch the substrate as desired.

Dual chamber plasma etcher with ion accelerator

In a thin-film formation process and system, a target and a substrate are placed in a sputtering space and a film-forming space, respectively, the pressure in the film-forming space is maintained at a pressure lower than the pressure in the sputtering space and a pressure sufficient for sputtered particles to move in the film-forming space with their mean free path which is longer than the distance between the grid plate and the substrate, and the target is sputtered to form a thin film on the substrate.

Thin-film formation system and thin-film formation process

PROBLEM TO BE SOLVED: To provide a forming method of a transparent conductive film made of metal oxide by sputtering by which the temp. increase of a substrate and the increase in resistivity of the formed conductive film can be suppressed and the film forming rate can be easily controlled. SOLUTION: In this forming method of a transparent conductive film made of metal oxide on a substrate by using a sputtering device, a metal oxide is used as a target and plasma is produced using a 13.56 to 100 MHz high frequency power supply f, and at the same time, a target potential E is controlled so as to be -150 to 50 V by a DC power supply. The film forming rate of the transparent conductive film on the substrate is controlled by the electric power supplied from the high frequency power supply.

Forming method of transparent conductive film

PROBLEM TO BE SOLVED: To prevent the scattering of sputtering particles caused by sputtering gas as occurred in the conventional sputtering method and permit rectified sputtering particles to the surface of a substrate. SOLUTION: The inside of a vacuum chamber 2 is separated by an isolation partition 17 into a film forming space 15 and a sputtering space 14. The isolation partition 17 is equipped with a grid plate 16 that has openings 18 of high aspect ratio. Sputtering particles 12 generated in the sputtering space 14 pass through the grid plate 16 and reach a substrate 8 in the film forming space 15. Sputtering particles 12 are rectified by the grid plate 16 when they pass through it, and since the sputtering particles 12 are not diffused by sputtering gas in the film forming space 15 as gas pressure in the film forming space 15 is maintained well below the pressure in the sputtering space 14, sputtering particles can reach the substrate in a well rectified state due to the grid plate 16.

Thin film forming method and equipment for the same

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Thin-film formation system and thin-film formation process

Forming method of transparent conductive film

Thin film forming method and equipment for the same

Herstellungsvorrichtung und -Verfahren für dünnen Filmen