In this paper, we consider the problem of locating multiple active spectrum subbands in a wide range of frequency bands. A major challenge associated with such wideband spectrum sensing is that it is either infeasible or too expensive to perform Nyquist sampling on the wideband signal. In this paper, we propose a sensing scheme based on a sub-Nyquist sampling method called multicoset sampling, which is similar to the polyphase implementation of the Nyquist sampling, but requires less A/D converters. In contrast to the traditional sub-Nquist approaches where the wideband signal is first reconstructed from the sub-Nyquist samples, we develop a method that directly estimates the power spectrum of the wideband signal of interest using the sub-Nyquist samples, by exploiting its statistical properties. We also characterize the statistical distribution of the proposed power spectrum estimator, based on which we obtain a constant-false-alarm energy detector for the frequency bins. Simulation results are provided to demonstrate the effectiveness of the proposed multiband spectrum sensing method based on sub-Nyquist sampling.

Wideband Spectrum Sensing Based on Sub-Nyquist Sampling

A 4 GHz third-order continuous-time ΔΣ ADC is presented with a loop filter topology that absorbs the pole caused by the input capacitance of its 4-bit quantizer and also compensates for the excess delay caused by the quantizer's latency. The ADC was implemented in 45 nm-LP CMOS and achieves 70 dB DR and -74 dBFS THD in a 125 MHz BW, while dissipating 260 mW from 1.1/1.8 V supply. The ADC occupies 0.9 mm2 including the modulator, clock circuitry and decimation filter.

/pdf/a-4-ghz-continuous-time-delta-sigma-adc-with-70-db-dr-and-74-39339ypdcu.pdf

A 4 GHz Continuous-Time $\Delta\Sigma$ ADC With 70 dB DR and $-$ 74 dBFS THD in 125 MHz BW

Wireless environments, high data rates and increased digitization require A/D converters with high dynamic range and large bandwidth at the lowest possible power consumption. A fully flexible continuous-time (CT) Δ Σ with programmable bandwidth, resolution and power consumption in 1.2 V 90 nm CMOS is presented able to satisfy those demands. By introducing flexibility into the core building blocks, a DR of 67/72/78/83 dB is achieved in maximum performance mode for WLAN, DVB, UMTS and BT for a power consumption of 6.8/5.5/6.4/5.0 mW, respectively. GSM operation is also feasible with a DR of 87 dB. For a given bandwidth, the flexibility allows to obtain the lowest power consumption for a desired performance. The overall energy efficiency is reached with a single-bit CT Δ Σ modulator avoiding high speed DEM circuits. Its low power consumption especially for high bandwidths is realized thanks to architecture and circuit level optimization. Linearity enhanced integrators, a threshold configurable comparator enabling loop delay compensation and optimized DAC implementations for jitter and avoiding signal dependency in the feedback pulses due to a large voltage swing are employed to increase the performance. The respective FOM equals 0.24/0.27/0.41/0.85 pJ per conversion.

A Single-Bit 500 kHz-10 MHz Multimode Power-Performance Scalable 83-to-67 dB DR CTΔΣ for SDR in 90 nm Digital CMOS

We first experimentally demonstrated a digital mobile fronthaul (MFH) architecture using delta-sigma modulation as the new digitization interface to replace the conventional common public radio interface (CPRI). Both one-bit and two-bit delta-sigma modulations were demonstrated, and the digitized signals were transmitted over on-off keying (OOK) or 4-level pulse-amplitude-modulation (PAM4) optical intensity modulation-direct detection (IM-DD) links. 32 LTE component carriers (CCs) were digitized and transmitted over a 25-km single-λ 10-Gbaud OOK/PAM4 link, so that 32 LTE carrier aggregation (CA) specified by 3GPP release 13 can be supported. Compared with the conventional digitization interface based on CPRI, the fronthaul capacity is increased by four times. Error vector magnitude (EVM) less than 5% or 2.1% for all LTE CCs was obtained using one-bit and two-bit delta-sigma modulators, so that high-order modulations (256QAM/1024QAM) can be supported. As a waveform-agnostic digitization interface, delta-sigma modulation can digitize not only 4G-LTE but also 5G waveforms, and its 5G compatibility was verified by filter-bank-multicarrier (FBMC) signals. The tolerance to bit error ratio (BER) of the proposed delta-sigma modulation-based digital MFH was evaluated, and no significant EVM degradation was observed for BER up to 3 χ 10−5. A comparison with analog MFH reveals that the proposed digital MFH based on delta-sigma modulation can offer improved resilience against noise and nonlinear impairments, and it increases the fronthaul capacity by four times compared with the conventional CPRI-based digital MFH without significant EVM penalty.

Digital mobile fronthaul based on delta-sigma modulation for 32 LTE carrier aggregation and FBMC signals

A reconfigurable CT 5th-order 1b ΔΣ modulator is presented. The DR/BW is programmable from 85dB@100kHz to 52dB@10MHz in 121 steps. Implemented in a 90nm CMOS process, the 0.36mm 2 IC includes 2 ΔΣ modulators, a bandgap reference, and a decimator. The power consumption of a single ADC in different modes ranges from 1.44 to 7mW at 1.2V supply

A 1.2V 121-Mode CT ΔΣ Modulator for Wireless Receivers in 90nm CMOS

We present an experimental continuous-time complex delta-sigma multi-bit modulator, implemented in standard 0.25-/spl mu/m CMOS technology and meeting all major requirements for application in IEEE 802.11a/b/g wireless LAN receivers. The clock frequency is 320 MHz, producing an oversampling ratio of 16 for 20 MHz channel bandwidths. The modulator supports two operation modes for zero-IF and low-IF receiver architectures respectively, requires a single 2.5-V power supply, and dissipates only 32 mW of power. The measured peak signal-to-noise ratio is 55 dB. Further experimental results using sine-wave and OFDM test signals are also presented.

/pdf/a-32-mw-320-mhz-continuous-time-complex-delta-sigma-adc-for-5a7ayr0krj.pdf

A 32-mW 320-MHz continuous-time complex delta-sigma ADC for multi-mode wireless-LAN receivers

Popular Tasks used by Researchers

How can I help with your research?

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

We encountered an error while loading the panel. Please try refreshing the page.

Something went wrong

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

Anyone with the link can view this chat. You can switch it back to private anytime.

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

V. Boccuzzi

Author Tools

Chat about Author

Papers

A 32-mW 320-MHz continuous-time complex delta-sigma ADC for multi-mode wireless-LAN receivers