A device integration method and integrated device. The method may include the steps of directly bonding a semiconductor device having a substrate to an element; and removing a portion of the substrate to expose a remaining portion of the semiconductor device after bonding. The element may include one of a substrate used for thermal spreading, impedance matching or for RF isolation, an antenna, and a matching network comprised of passive elements. A second thermal spreading substrate may be bonded to the remaining portion of the semiconductor device. Interconnections may be made through the first or second substrates. The method may also include bonding a plurality of semiconductor devices to an element, and the element may have recesses in which the semiconductor devices are disposed. A conductor array having a plurality of contact structures may be formed on an exposed surface of the semiconductor device, vias may be formed through the semiconductor device to device regions, and interconnection may be formed between said device regions and said contact structures.

Three dimensional device integration method and integrated device

Semiconductor structures and devices including strained material layers having impurity-free zones, and methods for fabricating same. Certain regions of the strained material layers are kept free of impurities that can interdiffuse from adjacent portions of the semiconductor. When impurities are present in certain regions of the strained material layers, there is degradation in device performance. By employing semiconductor structures and devices (e.g., field effect transistors or “FETs”) that have the features described, or are fabricated in accordance with the steps described, device operation is enhanced.

Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same

https://ir.nctu.edu.tw/bitstream/11536/21381/1/000316677900001.pdf

Growth, dielectric properties, and memory device applications of ZrO2 thin films

A method for bonding at low or room temperature includes steps of surface cleaning and activation by cleaning or etching. The method may also include removing by-products of interface polymerization to prevent a reverse polymerization reaction to allow room temperature chemical bonding of materials such as silicon, silicon nitride and SiO2. The surfaces to be bonded are polished to a high degree of smoothness and planarity. VSE may use reactive ion etching or wet etching to slightly etch the surfaces being bonded. The surface roughness and planarity are not degraded and may be enhanced by the VSE process. The etched surfaces may be rinsed in solutions such as ammonium hydroxide or ammonium fluoride to promote the formation of desired bonding species on the surfaces.

Method for low temperature bonding and bonded structure

Si and SiGeC layers are formed in an NMOS transistor on a Si substrate. A carrier accumulation layer is formed with the use of a discontinuous portion of a conduction band present at the heterointerface between the SiGeC and Si layers. Electrons travel in this carrier accumulation layer serving as a channel. In the SiGeC layer, the electron mobility is greater than in silicon, thus increasing the NMOS transistor in operational speed. In a PMOS transistor, a channel in which positive holes travel, is formed with the use of a discontinuous portion of a valence band at the interface between the SiGe and Si layers. In the SiGe layer, too, the positive hole mobility is greater than in the Si layer, thus increasing the PMOS transistor in operational speed. There can be provided a semiconductor device having field-effect transistors having channels lessened in crystal defect.

FET having a Si/SiGeC heterojunction channel

Doped and undoped silicon homoepitaxy and Si1−xGex‐on‐Si heteroepitaxy have been achieved by cold‐wall ultrahigh vacuum chemical vapor deposition using disilane (Si2H6), silane (SiH4), digermane (Ge2H6), and germane (GeH4) as the reactant gases. Boron and phosphorus doping were achieved by flowing B2H6 and PH3 dopant gases, respectively, into the reactor. The growth mechanism and film quality of intrinsic Si, B/P‐doped films, and Si1−xGex alloys using SiH4 and Si2H6 are comparatively studied in this article. The crystallinity of the films was examined by Nomarski microscopy after Schimmel etching, transmission electron microscopy (TEM), and in situ reflection high energy electron diffraction (RHEED). The defect density of the intrinsic Si films grown by Si2H6 and SiH4 was found to be below the TEM detection limit (105/cm2). B‐doped and P‐doped single‐crystal Si were deposited using Si2H6 or SiH4 with a partial pressure of 10 mTorr at substrate temperatures from 550 to 600 °C. The B‐ and P‐doping concentra...

Cold‐wall ultrahigh vacuum chemical vapor deposition of doped and undoped Si and Si1−xGex epitaxial films using SiH4 and Si2H6

The fabrication and characterization of heterojunction PMOSFETs with strain-engineered Si/sub 1-x-y/Ge/sub x/C/sub y/ channel is reported for the first time. The study has demonstrated the performance enhancement of partially strain compensated Si/sub 0.793/Ge/sub 0.2/C/sub 0.007/ MOSFET over fully-strained metastable Si/sub 0.8/Ge/sub 0.2/ channel. Complete strain compensation by incorporating higher amounts of C (Ge-to-C ratio=10:1), however, results in the degradation of device characteristics as compared to the Si/sub 1-x/Ge/sub x/ sample.

Novel SiGeC channel heterojunction PMOSFET

We present the evaluation of the strain-stabilizing capabilities of C in the Si/sub 1-x/Ge/sub x/ system. To demonstrate these effects, we have designed Si/sub 1-x-y/Ge/sub x/C/sub y/ heterojunction PMOSFET devices over a range of Ge concentrations, with thicknesses that would typically result in related or metastable films under normal processing conditions. The dc characteristics of Si/sub 1-x-y/Ge/sub x/C/sub y/, SiCe, and Si PMOSFETs (L=10 /spl mu/m) were evaluated at room temperature and at 77 K. In general, the saturation mobility in Si/sub 1-x-y/Ge/sub x/C/sub y/ devices is higher than that of Si/sub 1-x/Ge/sub x/ and Si devices at low gate bias and room temperature. This enhancement is attributed to the strain stabilization effect of C. With proper optimization of Ge and C concentrations, it is possible to fabricate devices with significant improvements in drive current under normal operating conditions (0-3 V, 300 K). This application of Si/sub 1-x-y/Ge/sub x/C/sub y/ in PMOSFETs demonstrates the potential benefits of using of C in the Column IV heterostructure system.

Design, fabrication, and analysis of SiGeC heterojunction PMOSFETs

The dc characteristics of Si1−x−yGexCy P-channel metal–oxide–semiconductor field-effect transistors (PMOSFETs) were evaluated between room temperature and 77 K and were compared to those of Si and Si1−xGex PMOSFETs. The low-field effective mobility in Si1−x−yGexCy devices is found to be higher than that of Si1−xGex (grown in the metastable regime) and Si devices at low gate bias and room temperature. However, with increasing transverse fields and with decreasing temperatures, Si1−x−yGexCy devices show degraded performance. The enhancement at low gate bias is attributed to the strain stabilization effect of C. This application of Si1−x−yGexCy in PMOSFETs demonstrates potential benefits in the use of C for strain stabilization of the binary alloy.

Heterostructure P-channel metal-oxide-semiconductor transistor utilizing a Si1-x-yGexCy channel

The reactions of atomic hydrogen with boron-doped Si(100) were studied using temperature programmed desorption (TPD). In addition to adsorbing at surface sites, hydrogen penetrates into boron-doped Si(100) samples and gets trapped by forming subsurface boron–hydrogen complexes. H2-TPD spectra, taken after exposure to atomic hydrogen, showed, in addition to the well known dihydride (680 K) and monohydride (795 K) desorption features, two peaks at 600 and 630 K due to decomposition of subsurface boron–hydrogen complexes. Increasing total hydrogen uptake with increasing dosing temperature (1.7 ML at 300 K, 4.2 ML at 500 K), suggests an activation barrier for subsurface hydrogen uptake. A quantitative correlation between boron concentration and subsurface hydrogen uptake is shown.

Evolution of subsurface hydrogen from boron-doped si(100)

Popular Tasks used by Researchers

How can I help with your research?

Get more enhanced response by uploading the PDFs you want me to reference.

No relevant PDFs in your library

SciSpace is the AI research assistant for academics. Run systematic literature reviews on 280M+ papers, and write papers with cited sources. Trusted by 1M+ students, PhDs & researchers.

SciSpace | AI for Research

We encountered an error while loading the panel. Please try refreshing the page.

Something went wrong

Analyze PDFs

Code & Manuscripts

Funding & Grants

Literature & Patents

Medical & Clinical Data

Systematic Review

Visualize & Present

Web & Data

Build a Google Scholar-like website for your research.

Build a website

Create charts and images for your research

Create a Chart

Write a paper for submission to a journal

Draft a manuscript

Patent Search

Design eye-catching scientific posters in minutes.

Scientific Poster Generation

Systematic Literature Review

Anyone with the link can view this chat. You can switch it back to private anytime.

One task is running at the moment. Your messages will be shown right after.

Drag and drop or click here to browse

Loved by <highlight>1 million+</highlight> researchers

Extract a list of specific topics and their sources from unstructured text

Topics

Compare and analyze relevant papers that matches with your search

Papers

Get insights from PDFs and bookmarked papers from your library

My library

Recent searches

Try searching for:

Catch AI-generated content in scholarly and non-scholarly content

{ai} Detector

Ai Writer

Get PDF Summaries, highlighted text explanations 

Chat with PDF

Effortlessly create in-text citations and bibliographies in APA and 2,500 other formats

Citation generator

Get explanations, summaries, and answers on academic papers

Ease up your research workflow with {scispace}'s cohort of exciting AI tools

Elevate your academic writing skills and convey your ideas the way you want

Paraphraser

Explore our range of reading and writing tools

Your file is being prepared and should be ready in a few minutes. If it's a large file, it might take a bit longer. You can close this window, and we'll email you the file when it's done.

You have reached a maximum limit of <strong>{limit}</strong> columns in the table. Remove at least <strong>1</strong> column to add or create another one.

S. John

Author Tools

Chat about Author