A method and an apparatus for projecting an end of service (EOS) and/or an elective replacement indication (ERI) of a component in an implantable device and for determining an impedance experienced by a lead associated with the implantable device. An active charge depletion of an implantable device is determined. An inactive charge depletion of the implantable device is determined. A time period until an end of service (EOS) and/or elective replacement indication (ERI) of a power supply associated with the IMD based upon the active charge depletion, the inactive charge depletion, and the initial and final (EOS) battery charges, is determined. Furthermore, to determine the impedance described above, a substantially constant current signal is provided through a first terminal and a second terminal of the lead. A voltage across the first and second terminals is measured. An impedance across the first and second terminals is determined based upon the constant current signal and the measured voltage.

Power supply monitoring for an implantable device

A semiconductor device includes a via structure and a conductive structure. The via structure has a surface with a planar portion and a protrusion portion. The conductive structure is formed over at least part of the planar portion and not over at least part of the protrusion portion of the via structure. For example, the conductive structure is formed only onto the planar portion and not onto any of the protrusion portion for forming high quality connection between the conductive structure and the via structure.

Semiconductor Device and Method of Fabricating the Same

In a manufacturing method of a package carrier, a substrate including a first metal layer, a second metal layer having a top surface and a bottom surface opposite to each other, and an insulating layer between the first and second metal layers is provided. The second metal layer has a greater thickness than the first metal layer. A first opening passing through the first metal layer and the insulating layer and exposing a portion of the top surface of the second metal layer is formed. The first metal layer is patterned to form a patterned conductive layer. Second openings are formed on the bottom surface of the second metal layer. The second metal layer is divided into thermal conductive blocks by the second openings that do not connect the first opening. A surface passivation layer is formed on the patterned conductive layer and the exposed portion of the top surface.

Package carrier and manufacturing method thereof

A tunable light-emitting diode (LED) lamp for producing an adjustable light output. In one embodiment, the LED lamp includes a drive circuit for driving LED dies in one of a plurality of light output configurations (e.g., a pre-sleep configuration, a phase-shift configuration, and a general lighting configuration). Further, the LED lamp may include an output-select controller and/or input sensor electrically coupled to the drive circuit to select the light output configuration. As such, the LED lamp is tunable to generate different levels of spectral output, appropriate for varying biological circumstance, while maintaining a commercially acceptable light quality and color rendering index.

Tunable LED lamp for producing biologically-adjusted light

A lighting device is described for receiving source light within a predetermined source wavelength range, converting the source light into a converted light, and reflecting the converted light to a desired output direction. The lighting device may use a micro electromechanical system (MEMS) device to receive and redirect the source light to the desired output direction. A conversion coating may be applied to the operative surface of the MEMS device to convert the source light into a converted light.

Wavelength converting lighting device and associated methods

Provides semiconductor devices and method for fabricating devices having a high thermal dissipation efficiency. An example device comprises a thermally conducting structure attached to a surface of the semiconductor device via soldering. The thermally conducting structure is essentially formed of a thermally conducting material and comprises an array of freestanding fins, studs or frames, or a grid of connected fins. A process for fabricating such a semiconductor device includes forming a thermally conducting structure on a carrier and attaching the thermally conducting structure formed on the carrier to a surface of the semiconductor device via soldering.

Semiconductor device with a high thermal dissipation efficiency

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Semiconductor device with a high thermal dissipation efficiency