The embodiment of the invention relates to the technical field of electronics, particularly relates to a chip testing device, system and method, and aims at providing a universal testing device whichcan adapt to various types of chips. The device comprises a testing bottom plate; the testing bottom plate comprises a testing control unit, a testing interface unit, a power accessing unit and a chipaccessing unit; the testing control unit at least comprises a programmable logic unit, and the programmable logic unit is used for providing a logic circuit which is suitable for a to-be-tested chip;the chip assessing unit is used for providing a chip interface which matches with the to-be-tested chip to allow the to-be-tested chip to be electrically connected with the programmable logic unit; the testing interface unit is electrically connected with the testing control unit and used for receiving a testing instruction transmitted by operation equipment and provides the testing instruction to the programmable logic unit; the power supply accessing unit is used for connecting a power supply and providing electricity for the testing bottom plate.

Chip testing device, system and method

The invention provides an anti-interference performance test method and system for power supply chips. A power supply with stable voltage is provided for a power supply chip to make the power supply chip work normally under the power supply, and a first voltage waveform curve of the output voltage of the power supply chip is measured; an radio frequency module is provided, the radio frequency module is made to work under a preset frequency and its maximum rated power and put close to the power supply chip, and a second voltage waveform curve of the output voltage of the power supply chip in the process in which the radio frequency module approaches the power supply chip is measured; and the anti-interference performance of the power supply chip is determined according to the first voltagewaveform curve and the second voltage waveform curve of the power supply chip. The test method of the invention is simple, and can evaluate the anti-interference performance of the power supply chip without increasing the cost.

Anti-interference performance test method and system for power supply chips

The invention discloses a test motherboard usable for various chip packaging forms. The test motherboard comprises a programmable chip. A port connected with a test machine bench is reserved in the programmable chip. The programmable chip is connected with a configuration chip and a first high speed socket. The first high speed socket is connected with at least one second high speed socket which is connected with a simulation signal test point. According to the invention, compatibility test design of all kinds of chip to the test machine bench can be achieved; test board development time required for testing the chip is greatly reduced; measurement of digital logic and simulation signals can be achieved simultaneously; the motherboard is reusable; investment on development of the board is reduced; and maintenance cost is also reduced.

Test motherboard usable for various chip packaging forms and test method

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Test motherboard usable for various chip packaging forms and test method