The embodiment of the invention provides a high-speed peripheral-device interconnected-bus port configuration method and an apparatus The method comprises of reading level-up and/or level-down values of a PCIE auxiliary signal line on a PCIE main apparatus; based on the read level-up and/or level-down values, identifying types of PCIE board cards; the PCIE board cards are connected with the PCIE auxiliary signal line and performs level-up and/or level-down processing to the PCIE auxiliary signal line by the level-up and/or level-down devices; and the PCIE bus is configured to be a PCIE port The technology scheme of the invention achieves a purpose of configuring port types of the PCIE main apparatus based on the PCIE board-card types, and reduces cost of identifying the PCIE board-card types

High-speed peripheral-device interconnected-bus port configuration method and apparatus

The invention provides a bus interface patch board and a data transmission system. The bus interface patch board comprises a bus interface connector and a universal serial bus (USB) interface. The bus interface connector comprises n connecting wires; one ends of the n connecting wires are respectively connected with corresponding n pins in a bus interface, wherein n is a positive integer. The USB interface comprises m data lines. One ends of the m data lines are respectively connected with corresponding m data lines in USB equipment, wherein m is a positive integer and is less than n; the other ends of the m data lines in the USB interface are respectively connected with the other ends of m connecting wires in the n connecting wires of the bus interface connector. The bus interface patch board provided by the invention is of an integrated overall structure, so that when testing is performed on the bus interface through the USB equipment, a circuit does not need to be constructed temporarily, and therefore, the use is convenient, the connecting stability is higher, the testing efficiency can be improved, and the testing stability and accuracy are ensured.

Bus interface patch board and data transmission system

Disclosed are a port configuration method and device for a high-speed peripheral component interconnect express. The method comprises: reading a pull-up and/or pull-down level value of a PCIE auxiliary signal line on a PCIE master device, identifying the type of a PCIE board card in accordance with the read pull-up and/or pull-down level value, the PCIE board card being connected to the PCIE auxiliary signal line, and performing pull-up and/or pull-down processing on the PCIE auxiliary signal line by a pull-up and/or pull-down device (101); and configuring the PCIE bus line on the PCIE master device to be a PCIE port matching with the type of the PCIE board card (102). The solution reduces the overhead for identifying the type of the PCIE board card while achieving the purpose of configuring the port type of the PCIE master device in accordance with the PCIE board card type.

Port configuration method and device for high-speed peripheral component interconnect express

The utility model provides a bus interface circuit and an electronic device The bus interface circuit comprises a switching chip and an interface circuit, wherein the switching chip is used for controlling switching of output signals between first bus signals and second bus signals and is respectively connected with a first bus signal line and a second bus signal line The interface circuit is used for detecting the type of an external connector, triggering the switching chip to switch the output signals according to the detected type of the connector and receiving the output signals, and is connected with the switching chip An embodiment of the bus interface circuit achieves automatic detecting and switching by using the circuit, and the same slot is led to output different signals, so that cost can be reduced, and space occupied on a printed circuit board can be effectively reduced

Bus interface circuit and electronic device

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Bus interface circuit and electronic device