Topic
Wright etch
About: Wright etch is a research topic. Over the lifetime, 16 publications have been published within this topic receiving 98 citations.
Papers
TL;DR: The Wright etch [M. W. Jenkins et al. as discussed by the authors, used to reveal defects in silicon, has been examined as a defect etchant for GaAs epitaxial layers on silicon.
Abstract: The Wright etch [M. W. Jenkins, J. Electrochem. Soc. 124, 757 (1977)], hitherto used to reveal defects in silicon, has been examined as a defect etchant for GaAs epitaxial layers on silicon. Various calibration techniques, including transmission electron microscopy of etched epitaxial layers, have been used to establish that etch features correspond with dislocations. Problems involved in direct comparisons of defect densities measured by different methods are discussed.
32 citations
TL;DR: In this paper, photoluminescence imaging was used to detect stacking faults in Cz silicon ingots before and after thermal wet oxidation, and the lifetime variations in the images were correlated with the location of the rings in the preferentially etched surfaces, and good agreement was found.
18 citations
TL;DR: In this article, the effects of phosphorus diffusion on growth and shrinkage of oxidation-induced stacking faults (OSF) in silicon have been investigated using the Wright etch and transmission electron microscopy (TEM).
Abstract: Effects of phosphorus diffusion on growth and shrinkage of oxidation‐induced stacking faults (OSF) in silicon have been investigated using the Wright etch and transmission electron microscopy (TEM). Within the phosphorus‐doped layer, the Wright etch fails to delineate OSF whose existence TEM observations have confirmed. Faster growth or slower shrinkage of OSF has been observed not only during phosphorus deposition but also during subsequent annealing with increasing phosphorus dose, indicating interstitial supersaturation. A model for interstitial generation has been proposed.
14 citations
TL;DR: In this article, a defect decoration etch was used to detect weaknesses at the bond interface, and the Wright etch is found to be a particularly suitable etch for defect detection.
Abstract: A new silicon-silicon bond characterization technique has been demonstrated. Defect decoration etches can be used to detect weaknesses at the bond interface, and the Wright etch was found to be a particularly suitable etch. Defects at the bond interface are decorated in the cleaved cross section of bonded wafers, and the appearance of the etch figures is a qualitative indicator of the bond completeness. The clearest results are seen when the anneal takes place at or above about 1000 o C. This technique also decorates the surface of a bonded and thinned wafer and can highlight the presence of small voids, undetectable by IR transmission, that are present at the bond interface. The technique is mainly qualitative in nature but can also give semiquantitative information
9 citations
1 Mar 1992
TL;DR: In this paper, a pipeline defect which became a leakage path between source and drain in an n-channel MOSFET was identified and the cause of the pipeline was the improper SWAMI (side wall masked isolation) etch which generated stress at the island corners.
Abstract: A pipeline defect which became a leakage path between source and drain in an n-channel MOSFET was identified. It was found that a 20-second Wright-etch will clearly delineate the pipe. The cause of the pipeline was the improper SWAMI (side wall masked isolation) etch which generated stress at the island corners. This stress generated high density dislocation lines which made vacancies readily available for enhanced phosphorus diffusion. >
8 citations
Related Topics (5)
Performance Metrics
| Year | Papers |
|---|---|
| 2017 | 1 |
| 2015 | 1 |
| 2012 | 2 |
| 2011 | 1 |
| 2004 | 1 |
| 2002 | 1 |