Abstract: This paper proposes a unified distributed control strategy for DC microgrid operating modes, without bus voltage signaling or mode detection mechanisms that are normally required for decentralized control strategies. The proposed control strategy is based on the novel integration of distributed controllers for energy balancing between DC microgrid energy storage systems with distributed controllers used to regulate the average DC microgrid bus voltage, and a new method for controlling the grid connected rectifier that maintains the distributed control structure. Under the proposed control strategy, seamless mode transitions are achieved between qualitatively different operating modes, namely, 1) grid connected operation with the rectifier providing load balancing, 2) grid connected operation with the rectifier charging the energy storage systems, and 3) islanded operation. In all operating modes, the average DC microgrid bus voltage is regulated to the microgrid voltage reference, and the energy storage systems are controlled independently of the operating mode to achieve and maintain a balanced energy level. Simulations are presented demonstrating the performance of the proposed control strategy for a 380 VDC datacenter with intermittent photovoltaic generation and communication delays expected from a WiFi control network implementation.

Abstract: With the wide application of voltage source converters (VSCs) in power system, dc-bus voltage control instabilities increasingly occurred in practical conditions, especially in weak ac grid, which poses challenges on stability and security of power converters applications. This paper aims to give physical insights into the stability of dc-bus voltage control affected by ac-bus voltage control in VSC connected to weak grid. The concepts of damping and restoring components are developed for dc-bus voltage to describe the stability of dc-bus voltage control. The impact of ac-bus voltage control on dc-bus voltage control stability can be revealed by investigating the impact of ac-bus voltage control on damping and restoring components essentially. Furthermore, the detailed analysis for the impact of ac-bus voltage control on damping and restoring components is presented considering varied ac system strengths, operating points, and ac-bus voltage control parameters. The simulation results from 1.5-MW full-capacity wind power generation system are demonstrated which conform well to the analysis. Finally, the experimental results validate the analysis.

Abstract: We propose an algorithm capable of solving the load power flow problem in ac droop-regulated microgrids. Based on radial distribution networks, these systems lack a slack bus for facilitating the computation by means of conventional methods. Rather than having the stiff bus that provides a voltage reference and supplies the necessary power, the voltage and power regulation must be shared among the distributed resources as a function of their frequency and voltage droop functions. The proposed algorithm is based on the well-known backward/forward sweep algorithm, conventionally employed to solve grid-connected radial load power flows, with the interesting property that they are derivative-free. We have expanded the algorithm to cope with the lack of slack bus. In this paper, we show the theoretical foundation and provide some tests with ex-post computations to investigate the coherence of the results.

Abstract: In this paper a brief review on different multilevel inverter topologies are discussed. Inverter is a power electronic device that converts DC power into AC power at desired output voltage and frequency. Multilevel Converters nowadays have become an interesting area in the field of industrial applications. Conventional power electronic converters are able to produce an output voltage that switches between two voltage levels only. Multilevel Inverter generates a desired output voltage from several DC voltage levels at its input. The input side voltage levels are usually obtained from renewable energy sources, capacitor voltage sources, fuel cells etc. The different multilevel inverter topologies are: Cascaded H-bridges converter, Diode clamped inverter, and Flying capacitor multilevel inverter. Multilevel inverters nowadays are used for medium voltage and high power applications. The different field of applications include its use as UPS, High voltage DC transmission, Variable Frequency Drives, in pumps, conveyors etc. The disadvantages of MLI are the need for isolated power supplies, design complexity and switching control circuits.

Abstract: The cascaded H-bridge (CHB) topology is ideal for implementing large-scale converters for photovoltaic (PV) applications. The improved quality of output voltage waveforms, high efficiency due to transformer-less connection, and ability to employ multiple instances of a maximum power point tracking (MPPT) algorithm are just some advantages. An important disadvantage is the required over-rating to ensure balanced three-phase currents at times of unequal PV generation. Unequal generation occurs due to shading, temperature inhomogeneity, faulty H-bridges, etc. Capacitor voltage balancing under such conditions requires zero-sequence voltage injection which increases the required number of series connected H-bridges. However, leakage current and safety requirements often dictate a need for isolation between PV arrays and the cascaded converter. Therefore, this paper proposes a converter topology that avoids the cost of extra series connected H-bridges by extending the function of dc–dc converters that provide isolation. Second harmonic power oscillations seen in typical cascaded topologies can also be eliminated or reduced through use of the proposed topology. Simulation and experimental results are presented that confirm correct operation of the proposed approach.

Abstract: In this paper, a new method is presented to simultaneously identify parameters of synchronous generator and its excitation system (EXS) using measurement data. These measurements could be provided by metering devices such as data acquisition system or fault recorders of the power plant. Since a smart grid is capable of providing synchronized measurements using phasor measurement units, the desired data could also be provided by these devices. In the proposed method, the reference voltage of the EXS is considered as the input signal, while the terminal voltage and output active power of the machine are considered as output signals. The desired parameters are classified into three categories using a sensitivity analysis: 1) the parameters that affect the terminal voltage; 2) the parameters that affect the active power; and 3) the parameters that do not considerably affect either. A multistage genetic algorithm optimization is used to iteratively identify the parameters. To show the effectiveness and accuracy of the proposed method, it is applied to a single machine with a dc-type EXS connected to an infinite bus. Using the proposed method, 19 parameters of synchronous generator and its EXS are identified within four stages.

Abstract: This paper proposes a vector-controlled squirrel cage induction motor drive with synchronized sinusoidal pulse width modulation (PWM) for traction applications. In traction applications, switching loss in insulated-gate bipolar transistors is very important, and hence, a switching frequency of few hundred hertz is used in these devices. A triangular carrier comparison-based synchronized sinusoidal PWM for medium-voltage inverters with low switching frequency (less than 500 Hz) is proposed in this paper. To have very good dynamic behavior of the synchronization scheme, the triangular carrier is generated from the instantaneous voltage references in a phase-locked manner. A synchronous carrier-based overmodulation scheme that ensures linearity between the reference voltage and the fundamental motor terminal voltage is also proposed. An inverse gain-based linearization method is used to match the reference and inverter output voltage fundamental. This overmodulation strategy fails at the zone of high values of modulation index and a reference modification approach is used in that zone. The proposed PWM and overmodulation schemes integrate methods of field weakening and harmonic current estimation available in the literature and propose a consolidated scheme, which ensures good dynamic response with wide speed variation for rotor flux-oriented induction motor drive. The scheme is experimentally verified and the results are presented.

Abstract: In this paper, an improved model predictive control (MPC) of the modular multilevel converter (MMC) with reduced computational burden is proposed A mathematical model of the MMC system based on the sum and difference of arm voltages are derived Instead of determining the switching state of individual submodule (SM), the voltage levels of MMC are considered as control options based on the assumption that the SM capacitor voltages are well balanced The further reduction of calculation effort is realized by using the tolerance band of capacitor voltages The proposed MPC has a hierarchical structure The cost function taking into account the ac-side current control, circulating current elimination and arm energy balancing is presented The optimal voltage level, selected by the cost function, provides the voltage reference for the pulse width modulation modulator The SM capacitor voltage balancing is done using a separate control loop The proposed control strategy is investigated using an MMC high-voltage direct current system with 200 SMs in each arm in real-time simulation and hardware-in-the-loop tests The performance of proposed method is verified by both steady-state and transient-state operations

Abstract: The OLED voltage of a selected pixel is extracted from the pixel produced when the pixel is programmed so that the pixel current is a function of the OLED voltage. One method for extracting the OLED voltage is to first program the pixel in a way that the current is not a function of OLED voltage, and then in a way that the current is a function of OLED voltage. During the latter stage, the programming voltage is changed so that the pixel current is the same as the pixel current when the pixel was programmed in a way that the current was not a function of OLED voltage. The difference in the two programming voltages is then used to extract the OLED voltage.

Abstract: An ultra-low voltage, low power, low line sensitivity MOSFET-only sub-threshold voltage reference with no amplifiers is presented. The low sensitivity is realized by the difference between two complementary currents and second-order compensation improves the temperature stability. The bulk-driven technique is used and most of the transistors work in the sub-threshold region, which allow a remarkable reduction in the minimum supply voltage and power consumption. Moreover, a trimming circuit is adopted to compensate the process-related reference voltage variation while the line sensitivity is not affected. The proposed voltage reference has been fabricated in the 0.18 $\mu\text{m}$ 1.8 V CMOS process. The measurement results show that the reference could operate on a 0.45 V supply voltage. For supply voltages ranging from 0.45 to 1.8 V the power consumption is 15.6 nW, and the average temperature coefficient is 59.4 ppm/°C across a temperature range of −40 to 85 °C and a mean line sensitivity of 0.033%. The power supply rejection ratio measured at 100 Hz is −50.3 dB. In addition, the chip area is 0.013 mm2.

Abstract: This paper proposes a field weakening strategy for a vector-controlled induction motor drive that enables the six-step mode of operation. This field weakening scheme can extract maximum possible torque without exceeding the machine voltage and current ratings and can utilize the available dc-link voltage completely. The main motive of this paper is to maintain current control even if the inverter output voltage is saturated, i.e., it enters the six-step mode of operation. Below base speed, the drive will operate as a normal rotor-flux-oriented vector-controlled drive. In field weakening region, when the inverter terminal voltage gets saturated and enters the six-step mode of operation, the q -axis current controller modifies the flux current reference instead of directly generating the q -axis voltage reference. The reason for this is that at saturated condition, there is only one degree of freedom, i.e., either d -axis voltage or q -axis voltage can be controlled independently. The inverter gate control is generated from a synchronous PWM strategy which is active in both linear and overmodulation zone. Hence, low switching frequency operation of the inverter is possible, which makes it a very attractive scheme for medium voltage drive like traction. The scheme is verified experimentally and the results are presented.

Abstract: This paper proposes the dynamic way of utilizing the maximum power from solar for battery charger by means of maximum power point tracker with the new controlling parameter for improving the stability in power system network. The most efficient controller for PV related voltage converters is designed by the most efficient way of calculating the controlling parameter for MPPT of a PV battery charger which works in a full range condition with consistent changing environment. Other than this, another strong controller parameter is presented. Ideal MPPT calculations give PV current or voltage reference esteem as output controller parameter, in which frequent change in atmosphere may bring framework precariousness. Here, another variable is characterized to kill the issue and enhance the soundness of the framework. So as to contrast the introduced circuit and a traditional framework, Perturb and Observe (P&O) MPPT calculation which is surely understood in PV frameworks is actualized on the same framework. Re-enactment results (Conventional P&O calculation and proposed structure) are displayed and thought about which show execution and adequacy of the proposed simple MPPT circuit.

Abstract: This paper presents a coordinated voltage control scheme (CVCS) for a cluster of offshore wind power plants connected to a voltage-source converter-based high-voltage direct current system. The primary control point of the proposed voltage control scheme is the introduced Pilot bus, which is having the highest short-circuit capacity in the offshore AC grid. The developed CVCS comprehends an optimization algorithm, aiming for minimum active power losses in the offshore grid, to generate voltage reference to the Pilot bus. During the steady-state operation, the Pilot bus voltage is controlled by dispatching reactive power references to each wind turbine (WT) in the wind power plant cluster based on their available reactive power margin and network sensitivity-based participation factors, which are derived from the dV/dQ sensitivity of a WT bus w.r.t. the Pilot bus. This method leads to the minimization of the risk of undesired effects, particularly overvoltage at the terminals of the WT located far away from the AC collector substation, by dispatching lower reactive power references compared with the ones nearer to the substation. In addition, this paper proposes a control strategy for improved voltage ride through capability of WTs for faults in the offshore grid, thus leading to improved dynamic voltage profile in the offshore AC grid.

Abstract: This paper proposes a single-switch converter with high step-up gain and low diode voltage stress, suitable for green power source conversion. By employing a coupled inductor and switched capacitor, the proposed converters achieve high step-up conversion ratio without adopting extremely high duty ratio or high turns ratio. The voltage spike that occurs on the power switch is alleviated, which allows a low-voltage-rated power switch with low $R_{\rm DS(\mathrm{\scriptscriptstyle ON})}$ to be adopted, thus reducing the conduction losses. Because the energy of the leakage inductor is recycled, the efficiency is improved. In addition, all diodes’ voltage stresses are lowered and are the same, so the selection of power diodes is convenient. Finally, a 300-W prototype circuit with an input voltage of 24 V and an output voltage of 400 V is implemented to verify the performance and functionality of the presented converter. Moreover, the measured highest efficiency is 95.4%.

Abstract: The open winding permanent magnet synchronous generator (PMSG) fed by semicontrolled converter takes the advantages of lower expense, simplified driving circuit, and reliable control realization With a single dc supply, the implementation of open winding configuration in practical application could be much convenient However, the common dc bus supplied configuration provides a zero-sequence current circuit unavoidably In order to reduce the harmonic distortion, a zero-sequence current suppression scheme is proposed The space vector pulse width modulation (SVPWM) technique is adopted to modulate the desired voltage reference in the three-dimensional (3-D) coordinate system by distributing duty cycles for active and zero vectors With a comprehensive investigation on the semicontrolled configuration, the achievable modulation region for αβ 0 voltage vector reference is analyzed Finally, the zero-sequence current suppression method with 3-D-SVPWM technique is implemented in a 1 kW open winding PMSG experimental system

Abstract: This paper presents a 10 b 80 kS/s SAR ADC with low-power duty-cycled reference generation. It generates a stable reference voltage on chip for the SAR ADC and imparts very good immunity against power supply interference to the ADC. A 0.62 V-VDD 25 nW CMOS reference voltage generator (RVG) is presented, which has only ±1.5% variation over process corners. A duty-cycling technique is applied to enable 10% duty-cycling of the RVG, resulting in negligible power consumption of the RVG compared to that of the ADC. Furthermore, a bi-directional dynamic preamplifier is adopted in the SAR ADC, which consumes about half the power compared with a regular dynamic structure and maintains noise and gain performance. Compared with prior-art low-power ADCs, this work is the first to integrate the reference generation and include it in the power consumption while maintaining a competitive 2.4 fJ/conversion-step FoM. The chip is fabricated in 65 nm CMOS technology.

Abstract: This study presents design and analysis of a dynamic voltage restorer (DVR) which employs a cascaded multilevel inverter with capacitors as energy sources. The multilevel inverter enables the DVR to connect directly to the medium voltage networks, hence, eliminating the series injection transformer. Using zero energy compensation method, the DVR does not need active energy storage systems, such as batteries. Since the energy storage system only includes capacitors, the control system will face some additional challenges compared with other DVR systems. Controlling the voltage of capacitors around a reference voltage and keeping the balance between them, in standby and compensation period, is one of them. A control scheme is presented in this study that overcomes the challenges. Additionally, a fast three-phase estimation method is employed to minimise the delay of DVR and to mitigate the voltage sags as fast as possible. Performance of the control scheme and estimation method is assessed using several simulations in PSCAD/EMTDC and MATLAB/SIMULINK environments, and experiments on a 7-level cascaded H-bridge converter.

Abstract: In islanding microgrids (MGs), distributed generation units are in charge of controlling voltage, frequency, and current of the grid on their own without any assistance from the main grid. Therefore, it is of utmost importance to select and design a controller that is robust against disturbances and load variations. In this study, a new sliding mode controller with a rotating reference voltage algorithm is proposed that improves the load sharing between distributed generators (DGs) in an islanded mode MG. In the proposed algorithm, in order to improve the performance and convergence rate of the controller, the amplitude of the reference voltage signal of the controller is adaptively modified. As a case study, the proposed strategy is studied based on the assumption that there are three DGs in the grid. One of the DGs is in charge of regulating voltage and frequency based on a reference signal, and the two other DGs are responsible for load sharing and loads the current control mode. The MG under s...

Abstract: Switched-capacitor (SC) DC-DC converters have several advantages over inductive DC-DC converters in that they are easily integrated on-chip and can scale to desired power levels, rendering themselves promising for integrated voltage regulators, especially for small, low-power systems. However, many SC DC-DC converters offer only a few conversion ratios, limiting their use for systems in which either the input or output voltages vary. This is particularly important in wireless systems where battery voltage degrades slowly. [1] proposed a technique to reconfigure cascaded SC converters to achieve arbitrary binary ratios: p/2N, 0 90% efficiency when downconverting from 2V to a 1.1-to-1.86V output voltage range.

Abstract: This paper presents a gate-leakage-based supply- and temperature-stabilized current reference generator that can output currents as low as 5 pA with minimal power overhead. The output reference current is generated by driving a set of gate-leakage transistors designed to have opposing temperature coefficients with a stabilized voltage reference. Low-power operation is achieved by generating the voltage reference via a novel two-stage, 4T push-pull structure that can operate at a low supply voltage, and driving this reference to the gate-leakage transistors via a low-voltage self-biased amplifier. Designed in a 65 nm CMOS process, the proposed current reference generator is simulated to consume 14.5 pW at a 0.5 V supply voltage. Due to the push-pull structure and complementary gate-leakage transistors, the design achieves a temperature stability of 31 ppm/°C from 0 °C to 100 ° C, and a line sensitivity of 0.94%/V averaged across 500 Monte Carlo samples, thereby enabling an ultra-low-power, area-efficient, and temperature- and supply-stabilized current reference solution at pA-levels.

Abstract: This paper presents a resonant feedback regulator-based control strategy to compensate the point of common coupling (PCC) voltage imbalance for doubly fed induction generator (DFIG). The proposed control strategy utilizes a resonant compensator to directly generate the rotor voltage reference, rather than conventionally generating the negative sequence rotor current references. Thus, the sequence decomposition and DFIG parameter dependency can be avoided. Impacts of the resonant parameters and the network resistance/reactance ( R/X) ratio on the control system performances, including the system stability, the rejection capability of the PCC voltage imbalance and the dynamic response of the control system, are theoretically analyzed. The experimental results validate the effectiveness of the proposed control strategy. The proposed voltage imbalance compensation strategy can be applied under any network R/X ratio condition.

Abstract: This paper presents a pair of high-temperature voltage and current references that have been designed in a silicon carbide CMOS process. The circuits presented have been fabricated in two fabrication runs and tested to 300 °C under probe and 540 °C in a packaged form. Test results over a single wafer at multiple sites are given to provide variation over process data. The circuits include a voltage reference with an accuracy of better than 100 ppm/°C and a constant current reference with a variation of $\pm 1~\mu \text{A}$ at a nominal output of 11 $\mu \text{A}$ from 25 °C to 540 °C.

Abstract: A simplified space vector pulse width modulation (SVPWM) is proposed for a three-level five-phase inverter. The proposed method generates the duty cycle of the three-level inverter switches based on dwell times of the two-level inverter and carrier index. The proposed method automatically determines the eligible vectors, region, and switching sequence of optimized five vectors based on the modulation index. Out of 243 available vectors, 113 most eligible vectors are used for generation of desired voltage reference in main subspace, while zeroing the average voltage in the auxiliary subspace by using the proper switching sequence. This method also uses the redundant vectors in each subcycle thus balances the dc-link capacitor voltages and no additional algorithm or techniques are needed to balance the dc-link capacitor voltage. The identification of the reference location with the carrier index using the signum function simplifies the algorithm implementation. Thus, the proposed method eases the implementation of optimum five vectors to a greater extent. Based on only changing the carrier index, the proposed method can be easily extended for any multiphase multilevel (5, 7,…, n) inverter. The simulation and hardware results of the three-level five-phase inverter validate the proposed simplified method.

Abstract: The present invention relates to a power supply device for voltage converter, which includes a master switch, a first controller for generating a first pulse signal to drive the master switch to be turned on and turned off, a second controller for comparing a detection voltage representing an output voltage and/or load current with a first reference voltage to determine the logic state of a control signal generated by the second controller, and a coupling element connected between the first controller and the second controller for transmitting the logic state of the control signal to the first controller and enabling the first controller to determine the logic state of the first pulse signal according to the logic state of the control signal. The second controller includes a driving module for generating a second control signal to drive a synchronous switch to be turned on and turned off.

Abstract: A novel low-power temperature-stable voltage reference without resistors is presented in this brief, which is compatible with standard CMOS technology. In order to reduce the temperature nonlinearity in the proposed voltage reference, threshold voltage and a proportional-to-absolute-temperature voltage form the basic linear-temperature components, which are achieved by resistorless threshold voltage extractor and asymmetric differential difference amplifier. Moreover, a self-biased current source with feedback is used to provide stable bias currents for the whole voltage reference, which can improve the power-supply noise attenuation (PSNA) with reduced current mirror errors. Verification results of the proposed voltage reference implemented with 0.18- $\mu\text{m}$ CMOS technology demonstrate that the temperature coefficient of 14.1 ppm/°C with a temperature range of −20 °C to 80 °C is obtained at 1.35-V power supply, and a PSNA of 75.7 dB is achieved without any filtering capacitor while dissipating a maximum supply current of 880 nA. The active area is $115\ \mu\text{m}\times 130\ \mu\text{m}$ .

Abstract: The two common three-leg, two-level voltage source inverters of a six-phase drive are able to produce 64 different switching states, representable as voltage space vectors in two orthogonal subspaces. The discrete output voltage of the inverter legs is usually controlled by means of a space vector modulation (SVM) technique, the aim of which is to produce the same volt-seconds as the continuous reference voltage vectors in both subspaces within a certain time frame (switching cycle). Using a simplified phase model of the machine consisting in each subspace of a voltage source and a leakage inductance, the phase currents are found to exhibit unwanted distortion harmonics. A proper sequence of voltage vectors has to be applied in order to reduce these harmonics. By allowing each inverter leg to change its output twice during the switching cycle (continuous modulation), 518400 different space vector sequences can be generated. This paper demonstrates that, among these sequences, only 11 need to be considered to modulate the reference vectors. Further simulation shows that, for a certain pair of reference vectors and leakage inductance ratio, only one of them reduces the distortion to a minimum. Due to the high computational effort, however, this optimization problem is not solvable online. To overcome this drawback, four different modulation strategies, the standard three-phase SVM, the fragmented sector mapping, the optimal interleaved and the approximated interleaved SVM, are derived from and compared with an offline optimization. Each strategy is evaluated regarding the resulting current distortion and the influence of the reference vectors as well as the inductance ratio. The harmonic current of these online modulation strategies is calculated in simulation and validated by experiments. Applying the proposed modulation techniques leads to a great reduction in the machine losses caused by switching.

Abstract: This paper presents a first reported passive-charge-sharing SAR ADC that achieves 16 bit linearity. It is known that on chip passive-charge-sharing suffers from poor linearity due to the unregulated reference voltage during bit trials. The proposed unique ADC architecture and calibration technique addresses the issue of signal dependent reference voltage droop during SAR ADC bit trials and orthogonalize the bit weights to achieve 16bit linearity. In addition, the proposed architecture maximizes SNR by sampling on to the bit cap, the first reported in this type of SAR ADC. Measurement result from a prototype test chip shows +/−0.8 LSB (16-bit level) INL at 1MSPS.

Abstract: This paper proposes a new vector-based dead-time compensation method for three-level T-type converters. The origins and effects of the dead-time voltage errors are analyzed in detail for different switching commutations and load conditions. In order to eliminate the dead-time distortion in each phase, a dead-time error voltage vector is introduced to adjust the reference voltage vector depending on load current polarity. The proposed vector-based dead-time compensation scheme has several advantages. First, it can be applied to multilevel converters with any number of voltage levels using any modulation schemes. Second, the pulse loss issue which is common in conventional pulse-based compensation strategies can be eliminated. In addition, the pulse saturation can be mitigated by operating the converters in overmodulation regions. All of these advantages and effectiveness of the proposed vector-based dead-time compensation method are verified through both simulation and experimental studies.

Abstract: This study presents a family of novel step-up DC/DC converters which do not have a right half plane zero in their transfer function resulting in faster dynamic behaviour of the converters under the load variation. In addition, the voltage stress on all the active switches and diodes is as low as the input voltage level. The basic topology of this converter has a voltage gain of up to two in steady state. The derivatives of the converter are realised by adding a switched capacitor voltage multiplier cell in order to increase the voltage gain further. The most salient feature of these converters is presence of only two switches in the basic converter and its derivatives. The dynamic performance of the proposed converter and its first derivative is analysed by small-signal model using the state-space averaging method. The theoretical model is verified by experiments using GaN high-electron-mobility transistors with 1 MHz switching frequency.