Abstract: A five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter is an arrangement of a three-level ANPC converter and a two-level cell. In this paper, a control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polarity of the FC voltage, and the polarity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation. The voltage across the FCs and the dc-link capacitors are simultaneously controlled at their reference voltage levels. The proposed control strategy is applied using power system computer aided design/electromagnetic transients including dc on a static synchronous compensator operating under a power-factor-correction mode to verify its performance. Experimental results are also presented for low and high number of angles per quarter period using a low-power laboratory prototype.

Abstract: A diode selection circuit for a light emitting apparatus according to some embodiments includes a plurality of light emitting devices coupled in series. The diode selection circuit includes a comparator configured to receive a rectified AC input signal and a reference voltage and to generate a control signal in response to comparison of the rectified AC input signal with the reference voltage, a voltage controlled current source configured to supply a current to the plurality of light emitting diodes that is proportional to the rectified AC input signal, and a switch configured to receive the control signal and to shunt current away from at least one of the plurality of light emitting devices in response to the control signal.

Abstract: In this paper, a cascade controller is designed and analyzed for a boost converter. The fast inner current loop uses sliding-mode control. The slow outer voltage loop uses the proportional-integral (PI) control. Stability analysis and selection of PI gains are based on the nonlinear closed-loop error dynamics. It is proven that the closed-loop system has a nonminimum phase behavior. The voltage transients and reference voltage are predictable. The current ripple and system sensitivity are studied. The controller is validated by a simulation circuit with nonideal circuit parameters, different circuit parameters, and various maximum switching frequencies. The simulation results show that the reference output voltage is well tracked under parametric changes, system uncertainties, or external disturbances with fast dynamic transients, confirming the validity of the proposed controller.

Abstract: A storage subsystem implements a background process for selecting voltage reference values to use for reading data from a non-volatile memory array, such as an array of multi-level cell (MLC) flash memory. The process involves performing background read operations using specific sets of voltage reference values while monitoring the resulting bit error counts. The selected voltage reference values for specific pages or other blocks of the array are stored in a table. Read operations requested by a host system are executed using the corresponding voltage reference values specified by the table.

Abstract: This disclosure concerns memory cell sensing One or more methods include determining a data state of a first cell coupled to a first data line in response to a request to sense a data state of a second cell coupled to a second data line, applying a reference voltage to the first data line, floating the second data line while adjusting a voltage of the first data line to an adjusted voltage associated with the determined data state of the first cell, determining an effect on the second data line due, at least in part, to the adjusting the voltage of the first data line, and sensing the data state of the second cell by applying a particular sensing voltage to a selected access line to which the first cell and the second cell are coupled, the particular sensing voltage based on the determined effect on the second data line

Abstract: In this work, we present a vibration-based energy scavenging system based on piezoelectric conversion for micropower applications. A novel maximum power point (MPP) tracking scheme is proposed to harvest the maximum power from the vibration system. A time-multiplexing mechanism is employed to perform energy harvesting and MPP tracking alternately. In the MPP tracking mode, a voltage reference that represents the optimal output voltage at the MPP is generated. A control unit then uses this reference to track the system operation around the MPP. The proposed system is capable of self-starting up without the help of an energy buffer. As a result, it is suitable for battery-less applications or when the energy buffer is completely drained. This tracking scheme has very small power overhead and is simple to implement in VLSI. Hence, it is especially applicable for micropower systems. The entire design was fabricated in a 0.35-μ m CMOS process. Experimental results verified the proposed MPP tracking scheme and demonstrated the system operation. Measurement results show that the power harvesting efficiency of the electrical circuitry is higher than 90%.

Abstract: A computing device is disclosed comprising digital circuitry, and a gate speed regulator operable to generate a supply voltage applied to the digital circuitry. A frequency synthesizer generates a first reference frequency, and a propagation delay oscillator generates a first oscillation frequency in response to the supply voltage, wherein the first oscillation frequency is compared to the first reference frequency to generate a first error signal. A reference oscillator generates a second reference frequency in response to a reference voltage, and a startup oscillator generates a second oscillation frequency in response to the supply voltage, wherein the second oscillation frequency is compared to the second reference frequency to generate a second error signal. An adjustable circuit, responsive to the first and second error signals, adjusts the supply voltage applied to the digital circuitry.

Abstract: In an ON/OFF type isolated DC-DC converter that stores electromagnetic energy in a main transformer during an ON period of a power switch and releases the electromagnetic energy to an output during an OFF period of the power switch, high-speed, highly stable output voltage control without the need for a photocoupler, for which the allowable temperature range is relatively narrow and the current transfer ratio changes over time, is performed. An integrating circuit including a resistor and a capacitor generates a ramp wave, and the ramp wave is superposed on a reference voltage of a reference voltage source Vref through a capacitor. A comparator compares a voltage Vo that is proportional to an output voltage of a converter with the reference voltage on which the ramp wave has been superposed, and transmits an inversion timing signal through a pulse transformer. During an ON period of a power switch, when the voltage Vo that is proportional to the output voltage exceeds the reference voltage on which the ramp wave has been superposed, the comparator is inverted and the power switch is turned OFF.

Abstract: A DC/DC converter has an output voltage and sources an output current to a load. The DC/DC converter includes an error amplifier with a reference input and a summing input. The reference input is electrically connected to a reference voltage. The summing input is electrically connected to the output voltage and the output current. The summing input is configured for adding together the output voltage and the output current. The error amplifier issues an error signal and adjusts the error signal dependent at least in part upon the output voltage and the output current. A comparator receives the error signal. The comparator has a ramp input electrically connected to a voltage ramp signal. The comparator issues an output signal that is based at least in part upon said error input. A power switch has an on condition and an off condition, and supplies dc current to the load when in the on condition. The power switch has a control input electrically connected to the comparator output signal. The power switch is responsive to the control input to change between the on condition and the off condition to thereby adjust the output current of the DC/DC converter.

Abstract: A data storage device is disclosed comprising a non-volatile memory and control circuitry comprising an interface operable to receive a supply voltage, and a capacitor. An operating voltage regulator converts the supply voltage into an operating voltage used to operate the non-volatile memory. The supply voltage is used to charge the capacitor to a capacitor voltage higher than the supply voltage, and during a power failure, a backup voltage regulator converts the capacitor voltage into a backup voltage substantially equal to the supply voltage. The operating voltage regulator converts the backup voltage into the operating voltage used to operate the non-volatile memory.

Abstract: Techniques and corresponding circuitry are presented for the detection of wordline leakage in a memory array. In an exemplary embodiment, a capacitive voltage divider is used to translate the high voltage drop to low voltage drop that can be compared with a reference voltage to determine the voltage drop due to leakage. An on-chip self calibration method can help assure the accuracy of this technique for detecting leakage limit. In other embodiments, the current drawn by a reference array, where a high voltage is applied to the array with all wordlines non-selected, is compared to the current drawn by an array where the high voltage is applied and one or more selected wordlines. In these current based embodiments, the reference array can be a different array, or the same array as that one selected for testing.

Abstract: A negative voltage generator includes a direct current voltage generator configured to generate a direct current voltage, a reference voltage generator configured to generate a reference voltage, an oscillator configured to generate an oscillation clock, a charge pump configured to generate a negative voltage in response to a pump clock, and a voltage detector. The voltage detector is configured to detect the negative voltage by comparing a division voltage, obtained by voltage dividing the direct current voltage, with the reference voltage, and to generate the pump clock corresponding to the detected negative voltage based on the oscillation clock.

Abstract: In various embodiments, an image sensor and method of using an image sensor are described. In an example embodiment, the image sensor comprises a semiconductor substrate and a plurality of pixel regions with each pixel region comprising an optically sensitive material over the substrate and positioned to receive light. There is a bias electrode for each pixel region, with the bias electrode configured to provide a bias voltage to the optically sensitive material of the respective pixel region. Also included is a pixel circuit for each pixel region with each pixel circuit comprising a charge store formed on the semiconductor substrate and a read out circuit, the charge store being in electrical communication with the optically sensitive material of the respective pixel region. The pixel circuit is configured to reset the voltage on the charge store to a reset voltage during a reset period, to integrate charge from the optically sensitive material to the charge store during an integration period, and to read out a signal from the charge store during a read out period. The pixel circuit includes a reference voltage node to be coupled to the charge store during the reset period and the read out circuit during the read out period where a reference voltage is applied to the reference voltage node and is configured to be varied during the operation of the pixel circuit.

Abstract: Disclosed is a solid-state imaging device capable of calculating the difference in charge obtained by photoelectric conversion, and capable of a high level of integration A solid-state imaging device (30) is provided with an AD converter (36) which is provided with: a first comparator (60) which outputs a signal corresponding to a first analogue signal of a first pixel (10a or 10b) by comparing said first analogue signal with a reference voltage supplied from the reference voltage generation unit (52) which generates a reference voltage which gradually changes; a second comparator (62) which outputs a signal corresponding to a second analogue signal of a second pixel (10c or 10d) by comparing said second analogue signal with the reference voltage supplied by the reference voltage generation unit (52); a difference circuit (64) which finds the difference between the signal corresponding to said first analogue signal and the signal corresponding to said second analogue signal and outputs a difference signal; and a counter circuit (68) which counts the number of pulses in a pulse sequence corresponding to the aforementioned difference signal and converts said difference signal into a digital signal

Abstract: A converter system including a cascade boost converter and inverting buck converter and controller for converting a rectified AC voltage to a DC output current. The system uses inductors and is configured to use a common reference voltage. The controller is configured to control switching of the converters in an independent manner to decouple operation from each other. For example, control pulses for the boost converter may be wider than pulses for the buck converter. The controller may control the boost converter based on constant on-time control and may control the inverting buck converter based on peak current control. The rectified AC voltage may be an AC conductive angle modulated voltage, where the controller may inhibit switching of the inverted buck converter at a dimming frequency having a duty cycle based on a phase angle of the AC conductive angle modulated voltage.

Abstract: Bit errors affecting cells of a solid-state, non-volatile memory are assigned to at least a first or a second category based on a relative amount of voltage shift that caused the respective bit errors in the respective cells. A reference voltage used to access the respective cells is adjusted to manage the respective bit errors of the first category. Additional corrective measures are taken to manage the respective bit errors of the second category.

Abstract: Inverters with distributed storage(DS) play a very important role in a microgrid. A new kind of inverter called virtual synchronous generator(VSG) is proposed in this paper to emulate the behavior of synchronous generator(SG) in the utility. The core algorithm of VSG is to employ an electromechanical transient mathematic model of round SG. There are two important operation modes in microgrid: active power/reactive power control (PQ control) and voltage/frequency control(Vf control). So a governor and an excitation controller are developed to fulfill these two functions. If Vf control is selected in islanded operation, the objective of governor is to keep frequency in an acceptable range by adjusting the input active power to match the output power. The excitation controller is to maintain the output voltage of VSG by controlling the excitation current; If PQ mode is selected in grid-connected mode, active power could follow the dispatch command very well by the governor. But a Q controller should be developed to control the reactive power by adjusting the voltage reference of excitation controller. Additionally, two kinds of PQ control are discussed here: (1) unit output power flow control (UPC) and (2) feeder power flow control (FFC). Finally, the proposed algorithm and control methods are verified by a single VSG experiment.

Abstract: The general model predictive current control uses a discrete-time model of the system to predict the future current behavior for all the possible voltage vectors generated by the inverter, and then the vector which minimizes a cost function is selected and applied. In this paper, a simplified model predictive current control method for a three-phase voltage-source inverter is presented in order to reduce the amount of calculations in the practical implementation of this method, especially for multilevel ones with large predictions. Utilizing the sector information of the reference voltage space vector, the proposed method just needs a subset of all the available voltage vectors for the prediction and optimization. The computational effort has been greatly reduced while the steady-state performance and dynamic response of the current control are improved. In addition, a reduced switching frequency is obtained. Simulation results are presented to verify the proposed method.

Abstract: In the lithium-ion batteries for electric vehicle applications, the charge equalizer is required to enhance life time and guarantee safety. For efficient charge equalization, a cell voltage sensing module should be used. However, the cost of the sensing module is relatively high. Thus, to achieve higher equalization performance without the cell voltage sensing module, a new automatic charge equalizer based on regulated voltage source is proposed. A fast regulated voltage source with average voltage of the batteries is implemented by a bidirectional dc-dc converter. The charge equalization can be automatically achieved by periodic connections between battery cells and regulated voltage source without the sensing module. The high equalization performance can be obtained by proposed reference voltage modulation and advanced skip mode. The operational principles and design considerations of the proposed equalizer are presented and equalization performance is verified by the prototype with 7Ah lithium-ion batteries.

Abstract: Embodiments of the invention describe a dynamic read reference voltage for use in reading data from non-volatile memory cells. In embodiments of the invention, the read reference voltage is calibrated as the non-volatile memory device is used. Embodiments of the invention may comprise of logic and or modules to read data from a plurality of non-volatile memory cells using a first read reference voltage level (e.g., an initial read reference voltage level whose value is determined by the non-volatile device manufacturer). An Error Checking and Correction (ECC) algorithm is performed to identify whether errors exist in the data as read using the first read reference voltage level. If errors in the data as read are identified, a pre-determined value is retrieved to adjust the first read reference voltage level to a second read reference voltage level.

Abstract: A constant voltage maximum power point (MPP) algorithm that automatically adjusts the reference voltage to account for varying environmental conditions is presented. A simple (and inexpensive) analog feedforward PWM controller is developed to continuously track the MPP of a solar cell array as the weather conditions vary. The solar array source is configured such that its open-circuit voltage is sampled without breaking the entire source from the load as is the case with other constant voltage MPP algorithms. MATLAB/Simulink simulations are presented to demonstrate the performance of the proposed MPP algorithm. The simulations correlated well with experimental results using a pure resistive load.

Abstract: This study develops a generalised pulse width modulation (PWM) approach to eliminate both the low-frequency oscillations and imbalances in the dc-link capacitor voltages, which are the main drawbacks of diode clamped converters. The algorithm has been developed within the carrier-based PWM framework to facilitate its implementation in diode clamped converters with four or more levels. In addition, a generalised control strategy for dc voltage control is proposed and its stability is demonstrated. The good performance of the proposed modulation technique is demonstrated from simulation and experimental results for a four-level diode-clamped inverter.

Abstract: An LED array switching apparatus, comprises: a plurality of LED arrays arranged in a serial path; a voltage supply coupled to the plurality of LED arrays; a plurality of current sources selectively coupled to the LED arrays, each of the current sources being switchable between a current regulating state and an open state; and a controller that outputs at least one control signal. The controller, the at least one switch and current sources cooperate together such that: when the voltage of the voltage source is below the at least one reference voltage, and/or when a predetermined level of current passes through the one or more current sources, at least one switch is closed and one or more associated current sources are controlled so as to break the serial path into one or more parallel paths each including less than all of the LED arrays.

Abstract: The power supply apparatus realizes a high-speed response, a stable operation, and a low output ripple with low power consumption The first stage switching regulator receives an input voltage and forms a first voltage The second stage switching regulator receives the first voltage and forms a second voltage The second stage switching regulator includes an N-phase (N is two or more) switching regulator, and the first voltage is set to be N times a target value of the second voltage The input voltage is set to be higher than the first voltage

Abstract: This work presents a Model Predictive Control (MPC) strategy for a Voltage Source Inverter (VSI) used in a three-phase Uninterruptible Power Supply (UPS) for critical loads. An MPC using continuous variables is proposed for solving this problem and the output of the controller is used as the reference voltage to be generated by a PWM modulator. The solution of this unconstrained MPC gives rise to an explicit solution that can be computed beforehand, allowing the prediction horizon to be easily extended. Therefore, the effect of the length of the prediction horizon over the system performance is also evaluated in the paper. This study addresses how this parameter should be chosen to minimize the error between the actual and the desired output voltage. The proposed control strategy has been tested on a simulated model of a UPS supplying a three-phase resistor load. This model has been developed using MATLAB/Simulink with PSIM software. The simulation results show that proposed continuous MPC controller achieves high performance and high degree of robustness.

Abstract: A non-volatile memory device and a sensing method thereof are disclosed, which can sense multi-level data using resistance variation The non-volatile memory device includes a cell array and a sensing unit The cell array includes a plurality of unit cells where data is read out or written The sensing unit compares a sensing voltage corresponding to data stored in the unit cell with a reference voltage, amplifies/outputs the compared result, measures a difference in discharge time where the sensing voltage is discharged in response to a resistance value of the unit cell during an activation period of a sensing enable signal after a bit line is precharged, and senses the data in response to the measured result

Abstract: A fast transient-response digital low-dropout (LDO) voltage regulator comprising only low-voltage MOS transistors was developed. The input voltage can be higher than the withstand voltage of the low-voltage MOS transistors by the proposed withstand-voltage relaxation scheme. The switching frequency of 1 GHz can be achieved using small-dimension low-voltage power-MOS transistors. The LDO occupies only 0.057 mm2 area using 40-nm CMOS technology, and covers a wide range of load currents from 400 μA to 250 mA. The response time is only 0.07 μs.

Abstract: Hot-electron injection is widely used for accurate programming of on-chip floating-gate voltage and current references. The conventional programming approach involves adapting the duration and magnitude of the injection pulses based on a predictive model which is estimated by using measured data. However, varying the pulse-widths or amplitudes introduces nonlinearity in the injection process which complicates the modeling, calibration and programming procedure. In this paper, we propose a linear hot-electron injection technique which significantly simplifies the programming procedure, and can achieve programming accuracy greater than 13-b which is limited by the thermal noise from the injection process. The procedure employs an active feedback circuit which ensures that all the nonlinear factors affecting the hot-electron injection process are held constant, thus achieving a stable and controllable injection rate. Measured results using an array of floating-gate voltage reference prototyped in a 0.5-μm standard CMOS process demonstrate that the injection rates can be controlled from 0.1 to 4.1 V for the programmable voltage range. Using 50-ms injection pulses, we show that the average injection rate can be adapted from 6.9 to 250 μV/cycle.

Abstract: In order to provide a power control device that supplies stable power to a load while deterioration of a storage battery is suppressed, a power control device (105) according to the invention is provided with: an acquisition unit (201) which acquires voltage information of voltage applied to a capacitor that is provided, by way of a first power line and a second power line, between a prescribed generation means and a load, and which acquires deterioration information indicating the deterioration condition of a storage battery connected to the prescribed generation means; a determination unit (202) which compares the acquired voltage information and a prescribed reference voltage to detect a fluctuation component of the voltage applied to the capacitor, and which determines the power that is output to the storage battery in such a way that the fluctuation component of the voltage applied to the capacitor is suppressed; and an instruction value notification unit (203) which notifies the storage battery of a current instruction value corresponding to the power that is output to the storage battery. The determination unit (202) detects the deterioration condition of the storage battery by using the deterioration information, and determines, in accordance with the deterioration condition of the storage battery, the power that is output to the storage battery.