Abstract: The ramp voltage of an analog to digital converter is started at a point below zero and the output of a pulse generator is gated into a counter when the ramp voltage passes through zero The pulse generator gate is closed when the ramp voltage passes through an unknown analog voltage to be measured or a reference voltage A calibration cycle is incorporated wherein a known reference voltage should be represented by a known number of pulses When the number of pulses is too high, the pulse generator may be slowed down or the rate of increase of ramp voltage may be speeded up If there are too few pulses, the pulse generator may be speeded up or the rate of change of ramp voltage may be slowed down

Abstract: A semiconductor substrate including a field effect charge pump for injecting charge into the substrate and a field effect transistor circuit, connected between the substrate and a reference voltage source, responsive to the level of substrate charge for clamping the substrate bias voltage at a desired level. By controlling the gate voltage applied to the field effect transistor circuit and the number and arrangement of transistors in the circuit, the substrate bias voltage can be clamped at a value greater than, equal to, or less than the transistor threshold voltage.

Abstract: An encoder for serially converting pulse amplitude modulated (PAM) samples into pulse code modulated (PCM) code words and a complementary decoder for serially recovering the quantized values of the samples from the code words include respective multi-stage resistive ladder attenuators which are matched, with each attenuator having several substantially independent stages, one for each weighted time slot of the PCM code word, which are assigned respective factors from a predetermined set of factors and which are selectively switched into and out of the attenuator such that the factor assigned to each stage is multiplicatively contributed to or withheld from the overall signal attenuation level afforded by the attenuator. The encoding process involves summing the sample with a reference voltage of appropriate polarity and then progressively factoring the sum by stepping the encoder attenuator in timed synchronism with the successive weighted time slots of the code words to provide a series of trial divisors which cause the encoder to generate bits with logic levels digitally indicating those of the factors that are and are not factors of the sum voltage as the sum voltage is divided to converge on the reference voltage. The decoding process, on the other hand, involves setting the decoder attenuator to provide a multiplier comprising the multiplicative combination of the factors of the sum voltage as identified by the bits of the code word, multiplying the reference voltage by the multiplier, and then subtracting the reference voltage to obtain the quantized value corresponding to the original sample. For bipolar encoding and decoding the first time slot of each code word is reserved for a sign bit and the reference voltages for the encoder and decoder are adjusted at the outset of each cycle to reflect the polarity of the sample. Appropriate selection of the reference voltage magnitude and of the factors comprised by the encoder and decoder attenuators provides complementary non-linear encoding and decoding in accordance with a known companding function of proven effectivity for maintaining a relatively high signal-to-distortion ratio with only a relatively few time slots alotted each PCM code word.

Abstract: A constant current circuit is disclosed which is useful, for example, in a system in which a constant current is supplied to one selected light emitting diode in an array of diodes. The constant current circuit, when energized, supplies a constant current through an output transistor to terminals of a row of light emitting diodes. The current flows through a selected one of the diodes having a closed return-path switch. The constant current is generated by coupling a constant reference voltage developed across a reference voltage diode through a semiconductor device to input electrodes of the output transistor. The coupling is constructed so that changes in the junction voltage drop of the semiconductor device, due to temperature, balance changes in the base-emitter voltage drop in the output transistor, when both are rendered conductive by a logic signal applied thereto.

Abstract: Disclosed is a method for localizing phase-to-phase and phaseto-ground faults such as short circuits in a polyphase power line The method includes the steps of deriving three voltages u, v and w, u being proportional to the voltage of the faulty line loop, v being a reference voltage across a resistor fed by a current proportional to the faulty current, and w being a reference voltage proportional to a voltage drop in a reference length of the faulty line loop measured across a reference impedance network fed by line currents The voltages u, y and w are integrated for a time interval chosen such that the time integral of the voltages v is null at the end of said time interval The integrated values of the voltages u and w obtained at the end of the time interval are stored and arithmetic operations are performed on the stored values to provide information as to the location of fault An apparatus for implementing this method is also disclosed

Abstract: A reference voltage generator circuit particularly suited for current source circuits having low temperature sensitivity and low voltage sensitivity. The circuit is comprised of a reference voltage circuit having low voltage sensitivity and relatively high temperature sensitivity, with an additional feedback circuit for feeding back a compensating temperature sensitivity to result in a low overall sensitivity. The temperature sensitivity of the reference generator is predominately due to the temperature sensitivity of a base to emitter diode voltage drop which may be selectively controlled or substantially cancelled by the proper selection of resistors in the feedback circuit so as to feed back a temperature sensitive component. The feedback signal is dependent upon the difference in the base to emitter voltage drops in two transistors conducting different magnitudes of current, and is similarly amplified so as to effectively allow cancellation of the basic reference generator sensitivity.

Abstract: A composite video signal is coupled by way of a first path through a gated clamp circuit to one input of a gating circuit. The composite video signal is also coupled to a low-pass filter which removes high frequency energy in the composite video signal. Amplitude peaks in the video signal at the output of the low-pass filter cause an amplitude detector to develop voltage pulses during each one of the horizontal sync pulse intervals. In response to these voltage pulses, a strobe generator causes the gated clamp to operate and clamp the composite video signal to a reference voltage during the sync interval. In addition, the voltage pulse also causes a monostable multivibrator to generate a window pulse at a second input of the gating circuit, the window pulse having an interval sufficiently long to always encompass the trailing edge of the horizontal sync pulse. As a result, the gating circuit passes the trailing edge of the horizontal sync pulse in the composite video signal and blocks the voltage spikes present during the active region of the video signal.

Abstract: A 1 A current supply stable to better than 1 ppm/h is described. The technique uses a standard feedback circuit, but many practical problems had to be solved to achieve the high stability. Details concerning a 10−3 °C stability oven, a 1 ppm/h variable reference voltage, and a 1 ppm/°C power resistor are given.

Abstract: An overvoltage and undervoltage detector circuit is disclosed in which two reference voltage producing circuits have their dissimilar outputs applied to first and second input terminals of a voltage comparator. The dissimilarity of the inputs to the comparator is reversed when a first voltage exceeding a predetermined level forward biases a first diode and raises the potential on one of the comparator input terminals or a second voltage less than a predetermined level forward biases a second diode and lowers the potential on the other comparator input terminal.

Abstract: A variable d.c. input voltage signal is converted to a square wave of amplitude corresponding to the voltage level of the input signal. The square wave is integrated to provide a saw tooth wave the slope of which is a function of the amplitude of the square wave. This saw tooth is compared with a fixed reference voltage and a switching signal in turn is generated when the saw tooth crosses the amplitude limits of the fixed reference voltage. The switching signal is then utilized to control the switching of the converter generating the square wave so that the frequency of the switching signal is a function of the level of the input voltage signal. This frequency may be counted and converted to a d.c. voltage to provide a long term digital integration system.

Abstract: This invention is mainly concerned with the checking of the masses of tobacco in individual cigarettes produced on a continuous-rod cigarette making machine. The signal from a Betaray scanning device (which is indicative of the mass of tobacco in a given portion of the continuous rod) is compared with a reference signal equivalent to an acceptable mass. The device is formed by an integrator; an input circuit for the integrator to receive both the continuously varying voltage from the Beta-ray device and the reference voltage, and to deliver to the integrator a voltage which at any instant is proportional to the algebraic sum of the two input voltages; a level discriminator connected to the output of the integrator; a normally-closed gate connected to the output of the discriminator; and a source of pulses for opening the gate briefly at the end of a defined period which corresponds to that portion of the continuous rod which will after cut-off constitute a cigarette, the source of pulses also being arranged to reset the integrator to zero immediately after completion of each brief opening of the gate. A memory device operates a rejection device to reject individual cigarettes which contain portions of the continuous rod having unacceptable masses.

Abstract: An electric power source for delivering a controllable voltage to a load. It has low power loss and is capable of acting as a programmable source of electric energy, one which can be used, for example, to furnish a very high-voltage output from a lightweight system. The power source is a modular type structure in which the apparatus is made up of a number of identical stages or modules connected in cascade. Each stage includes a voltage supply and floating reference voltage means connected to the supply. The voltage supply is connected to the output of the source through bilateral, solid-state switches along alternate electrically conductive paths which connect either one side or the other of the voltage supply to the output. A bistable circuit serves to control the bilateral switches, triggering of the bistable circuit being effected by radiation impinged upon light sensitive devices, the devices being connected to perform a setreset type function of the circuit. The floating reference voltage provides a constant electric potential for switching purposes. The system can be used to step up a voltage, and a form thereof can be used to step a voltage down.

Abstract: An AC analog to digital converter provides a one step conversion of an alternating (AC) analog voltage to a digital number proportional to the amplitude of the input analog voltage. A zero crossing detector responsive to the analog input voltage actuates switching logic to supply one-half cycle of the input voltage to a conventional integrator. Control logic, at the initiation of the next successive half cycle following the half cycle of integration of the AC input, switches a reference voltage of appropriate polarity and predetermined amplitude to the integrator for discharging the integrator to a zero voltage output level. The control logic gates a clock pulse train to a counter during the time interval of discharge of the integrator and inhibits further gating of the clock pulses to the counter upon integration back to zero value. The count accumulated in the counter during the discharge interval is proportional to the input magnitude and affords a direct digital output representing the analog amplitude of the input. The reference voltages comprise absolute DC reference voltages or DC voltages which are compensated for variations in the AC signal source, the latter being provided by an integrate and hold circuit operated by the same switching and control logic outputs as utilized in the converter itself.

Abstract: A power supply has transistors arranged to pass current from a power source to a load having a variable resistance so that current drawn by the load is variable The circuit includes a comparator amplifier which compares a reference voltage with output voltage and actuates a bias control transistor for reducing conductance of the transistors when an overload occurs A nonlinear current foldback means is connected in circuit with the bias control transistor to introduce a non-linear characteristic in the control of bias of the transistors

Abstract: Integrated circuit structure responsive to being triggered to produce output signals at precise time intervals following points in the operation of a device. The circuit is adapted for accurate repeating operation, and provides a plurality of signals at different precise time delays. A discrete capacitor is discharged to a predetermined value (reset) by a voltage regulator at each triggering of the circuit, and at the end of a short time starts to charge so that the voltage thereacross forms a repeatable exponential ramp. A plurality of comparators are coupled to the capacitor and each produces an output when the capacitor voltage reaches the reference voltage for that comparator. The triggering may be provided by a circuit including a reset capacitor which responds to the change of levels of a signal derived from the device to alternately charge and discharge the reset capacitor. The voltage across the reset capacitor is applied to a pair of comparators which produce current pulses during the beginning of the charge and discharge periods of the reset capacitor for operating the voltage regulator.

Abstract: A power supply for supplying a predetermined d.c. output voltage notwithstanding its connection to external a.c. voltage sources of different voltage magnitudes operates in either a full wave rectifying or diode ridge rectifying mode to accommodate the different source voltage. A zener diode senses the source voltage magnitude and a mode control voltage controls a switching circuit for establishing the power supply in the proper rectifying mode.

Abstract: A digital to analog (D/A) converter suitable for application to digital to synchro (D/S) conversion comprises serial MOS FET (Metallic Oxide Semiconductor-Field Effect Transistor) switches and an inverting amplifier, or buffer, to compensate for variations in FET resistance in the ON state. A reference voltage of a given polarity is gated ON in one FET and inverted in polarity in an amplifier with a gain of 1.0 for input to a bank of FET switches associated with a binary resistance network, accomplishing directly the conversion of digital data to an analog equivalent output. The reference voltage thereby gated in the first FET with one polarity is subsequently gated in the second FET switches, of the bank associated with the network, and with the opposite polarity, such that a nearly constant resistance path is afforded from the reference voltage to the output of the second FET switches. Employing identical FET switches throughout the D/A converter, the non-linear properties of the FET switches are compensated regardless of reference voltage polarity. To improve further the accuracy of D/A conversion of the invention, an input resistance is selected for the inverting amplifier equal in value to the resistance of the most significant bit resistor. Compensating resistors affording resistance equalization are provided for at least a few of the next, most significant bit positions resulting in highly accurate digital to analog and digital to synchro conversion using low cost MOS FET switches with high ON resistance.

Abstract: An AC voltage regulator which detects the instantaneous supply voltage in a phase shifter and compares it with the reference voltage by a comparator circuit so that in response to the output signals from the comparator, the firing angle of the thyristors connected to a supply voltage circuit may be controlled in order to maintain constant the effective load current.

Abstract: An analog input voltage is fed to each input of a plurality of comparators. The other input of each comparator is connected to a source of reference potential having a plurality of fixed reference voltage levels representing the digital quantization levels. The outputs of the comparators drive encoding logic including a plurality of clocked flip-flop stages. The complementary outputs of the flip-flop stages are connected to corresponding output lines to provide the binary digits of the equivalent digital word. The parallel-binary output signal is, at any instant, a true representation of the analog input voltage, that was present at the output of the comparators preceding each clock pulse.

Abstract: A. d.c.-d.c. power supply in which electric current is delivered to an output terminal through an inductance. Current is delivered to the output terminal from a power source when electronic switching elements are in an ''''on'''' state and through a diode element when the electronic switching elements are in an ''''off'''' state. A feedback circuit compares the voltage at the output terminal with a reference voltage to establish the state of the electronic switching elements. Immediately after changing the state of the electronic switching elements, the feedback circuit is rendered temporarily insensitive to transient voltage spikes resulting from the change of state of the switching elements.

Abstract: A system computing the distance of a reflecting object from the position of an echo pulse within a range gate or telemetering window includes, as the second one of two cascaded integrators, an incrementor for converting the output voltage of the first integrator into a train of counting pulses with a cadence proportional to speed, these counting pulses being fed to a distance register which is periodically discharged into a countdown register to provide a pulse count proportional to distance. The countdown register is progressively read out by clock pulses over a period beginning with the emission of a highfrequency burst by the radar transmitter and ending upon the attainment of a zero count, or possibly a negative count establishing the lower limit of a range gate, as determined by an associated decoder controlling the telemetering-window generator. The output voltage of the decoder may be used to ascertain, with the aid of a comparator receiving a fixed reference voltage, the instant when a craft equipped with the radar system approaches a target to within a critical distance whereupon the first integrator is disconnected from the radar receiver to operate as a speed memory on the basis of data previously stored therein; the decoder output then continues its decrease, by extrapolation, in accordance with the diminishing target distance until another comparator gives rise to a firing pulse detonating a charge aboard the craft.

Abstract: The linearity of the current transformation of a DC measuring transductor, having on a core of magnetisable material a primary winding carrying the DC to be measured and a secondary winding fed with an AC voltage, is improved by so controlling the AC voltage as to maintain the flux variation of the core at a constant value. The control is effected by means of a difference signal derived by comparison of a voltage constituting a measure of the flux variation with a constant reference voltage or by means of a signal representing the voltage loss occurring in a measuring circuit containing the secondary winding.

Abstract: Methods and circuits for reducing the glare component in a video signal obtained by line scanning an image of a field. In one method the video signal amplitude obtained when scanning a region of known grey value is compared with a reference voltage set to the theoretical amplitude level of the video signal for that grey. Any difference voltage is subtracted from the video signal so as to remove the movement of amplitude due to glare. Alternatively this difference signal controls the gain of a variable gain amplifier amplifying the video signal or in a further modification the corrected video signal. A closed loop circuit is also described in which the correction is achieved by a variable gain amplifier the gain control for which is derived from the difference signal obtained by comparing the output of the amplifier for a particular grey region with a reference voltage for that grey and clamping the white amplitude level of the amplifier output signal. The grey region may be inserted artificially into the field and more than one such region may be employed, the difference signals obtained from the various regions being averaged.

Abstract: A system for digital weighing, by utilizing an analog voltage of load cells representative of the weight of a load to be weighed, includes an analog-to-digital converter with a preamplifier and an integrator, a switch to connect the load cells to a power supply, means to turn off and on the switch, means to generate and store a signal based at least in part on the thermal voltage output of the load cells when the switch is off, and means to utilize that signal during the use of the analog-to-digital converter in a subsequent weighing operation when the switch is on. Preferably the system uses an analog-to-digital converter having a switch to couple the preamplifier to the integrator for a period of time and a switch to couple thereafter a reference voltage to the integrator during operation of the conversion. While these three switches are off, another switch is on. It couples the output of the preamplifier to a compensating circuit with a feedback to the preamplifier of opposite polarity voltage compensating for the thermal voltage of the load cells and the offset voltage and current of the preamplifier. The switch to the compensating circuit is off when the other switches are on.

Abstract: A phase measurement circuit having two integrators, one developing a first D.C. voltage proportional to a phase difference between two signals and a second developing a D.C. voltage proportional to 360* minus the phase difference. The voltages developed are summed and compared to a reference voltage and the resultant signal is applied to a differential amplifier whose output is a D.C. voltage proportional to the error and of a polarity indicative of the error direction. This error signal is fed back to the input of the integrators to compensate for errors that otherwise might exist due to conversion of phase voltages to D.C. voltages by correcting the phase reading and bringing the error back to zero.

Abstract: Low level pulses in the order of 100 millivolts or less can be detected and amplified regardless of variations in the voltage required to turn on the active device used in the amplifier. This is achieved by coupling an active device between a capacitor and a capacitively loaded output line, charging the output line to a reference voltage, applying a level setting voltage to the device to turn on the device; charging the capacitor to a voltage substantially equivalent to the level setting voltage to turn off the device while maintaining it such that any input signal superimposed on the level setting voltage will cause the device to again turn on and discharge the capacitively loaded output line thereby amplifying and inverting the superimposed input signal. The invention is particularly useful for sensing random access integrated semiconductor memories. The invention may be employed in either bipolar or field effect transistor technologies.

Abstract: An alternating current power supply control circuit utilizing a single sine wave inverter having a sine wave output which is derived from a DC source which presents a constant voltage to a load, is coupled to an unregulated AC supply voltage to add or subtract therefrom an incremental voltage required for regulation of the AC supply voltage. Unwanted or excess energy in the inverter is returned to the DC source to conserve power and prevent voltage build up in the inverter. The resultant output voltage which, if desired, may be converted by rectification to DC is compared with a desired voltage reference to generate an error signal to control the relative phase of the sine wave output of the inverter with respect to the phase of the supply voltage to achieve a regulated power supply.

Abstract: In a monitor for determining the real electrical power being delivered by a 3-phase source to a load, each phase voltage and a voltage which is proportional to and in phase with the corresponding line current are coupled to separate balanced detectors Each detector provides a DC voltage which is proportional to the real power being delivered by its corresponding phase The DC voltages from the balanced detectors are connected in series and the resulting sum voltage is coupled to a plurality of voltage comparators Each voltage comparator provides a signal when the sum voltage exceeds a predetermined magnitude and each of the voltage comparators is set to respond to a different sum voltage magnitude Since the sum voltage is proportional to the real power being delivered by the source, within the range of voltage magnitudes set, the output signals of the voltage comparators provide a measure of the power being delivered by the 3-phase source A binary output means, such as a relay, is controlled by each comparator

Abstract: A pulse generator for providing timed pulses, such as in a cardiac pacemaker, having a timing circuit comprising a capacitor which determines pulse width, and having a reference voltage node and a substantially constant voltage feedback node, apparatus for substantially increasing pulse width in response to decreases in the reference voltage comprising a first resistance connecting the capacitor to the reference node and a second resistance connecting the capacitor to the feedback node This voltage divider provided in the RC circuit will increase the time constant of the circuit to a new fixed value and make it respond to each decrease in reference voltage in a manner to keep the energy of the pulses from the pulse generator above a predetermined energy level over a wide range of voltage decreases