Voltage reference

Abstract: This paper introduces the use of the voltage multiplier technique applied to the classical non-isolated dc-dc converters in order to obtain high step-up static gain, reduction of the maximum switch voltage, zero current switching turn-on. The diodes reverse recovery current problem is minimized and the voltage multiplier also operates as a regenerative clamping circuit, reducing the problems with layout and the EMI generation. These characteristics allows the operation with high static again and high efficiency, making possible to design a compact circuit for applications where the isolation is not required. The operation principle, the design procedure and practical results obtained from the implemented prototypes are presented for the single-phase and multiphase dc-dc converters. A boost converter was tested with the single-phase technique, for an application requiring an output power of 100 W, operating with 12 V input voltage and 100 V output voltage, obtaining efficiency equal to 93%. The multiphase technique was tested with a boost interleaved converter operating with an output power equal to 400 W, 24 V input voltage and 400 V output voltage, obtaining efficiency equal to 95%.

Abstract: PURPOSE: A nonvolatile semiconductor memory device is provided to reduce current consumed at a sense amplifier when amplifying a small signal induced to a bit line by that a cell capacitor and a bit line capacitor hold an electric charge in common by precharging a bit line in a semiconductor device using a ferroelectric capacitor to a half of the level of a power voltage and increase amplifying function by decreasing the coupling effect by a gate capacitance of a sense amplifier CONSTITUTION: The memory device includes a sense amplifier(S1), a memory cell(M1), a plate driver(F1), a reference voltage generating portion(R1), a half power voltage generating device and a precharging circuit(P1) The sense amplifier senses a difference of a voltage between a bit line(BL) and a bit line bar(BLB) and amplifies the difference The memory cell, in which a switching transistor and a ferroelectric capacitor are in series connected, stores a data The plate driver is connected to the ferroelectric capacitor and drives a plate line applying a voltage to the ferroelectric capacitor The reference voltage generating portion generates a reference voltage necessary for sensing and amplifying The half power voltage generating device, to which a level of a power voltage is inputted, outputs a level of a half power voltage The precharging circuit supplies the half power voltage inputted from the half power voltage generating device to the bit line and bit line bar in response to a signal for controlling a bit line

Abstract: A temperature-compensated voltage reference that provides numerous advantages over zener diodes is described along with the implementation of thermal overload protection for monolithic circuits. The application of these and other advanced design techniques to IC voltage regulators is covered, and an example of a practical design is given.

Abstract: Mutual compensation of mobility and threshold voltage temperature variations may result in a zero temperature coefficient bias point of a MOS transistor. The conditions under which this effect occurs, and stability of this bias point are investigated. Possible applications of this effect include voltage reference circuits and temperature sensors with linear dependence of voltage versus temperature. The theory is verified experimentally investigating the temperature behavior of a simple voltage reference circuit realized in 0.35 /spl mu/m CMOS process.