TL;DR: In this paper, a power supply rail controller operates on an analog component having a signal input, a power input, and a signal output, and provides a control output responsive to the signal output.
Abstract: A power supply rail controller operates on an analog component having a signal input, a power input and a signal output. A voltage controller provides a control output responsive to the signal output. A power supply generates a voltage for the power input, where the voltage is responsive to the control output. The voltage is reduced in magnitude to reduce power dissipation and increased in magnitude to avoid signal distortion.
TL;DR: In this paper, a new phase-locked loop (PLL) system that uses adaptation algorithms is developed with the aim of improving speed of responses, robustness to AC voltage depressions, and harmonic rejection.
Abstract: This research addresses the special requirements of phase locked loops (PLLs) for a typical application with FACTS elements. A new PLL system that uses adaptation algorithms is developed with the aim of improving speed of responses, robustness to AC voltage depressions, and harmonic rejection. The adaptive PLL consists of the three control units that individually control frequency, phase angle, and voltage magnitude. The voltage controller output is used to compensate for reduced gain caused by the AC voltage magnitude depressions. The output phase angle and its derivative, the frequency signal, are controlled in two independent control systems in order to enable elimination of frequency and phase error without compromising transient responses. The simulation results are compared with a PLL available with the PSB MATLAB block-set and noticeable improvements are demonstrated. In particular, settling time and overshooting are significantly lower with conditions of reduced AC voltage magnitude.
TL;DR: In this paper, a method of controlling the output inverter of a microsource in a distributed energy resource system is described, where the inverter reaches maximum output power and minimum operating frequency at the same time, and further comprising using a voltage controller implementing a voltage vs. reactive current droop.
Abstract: A method of controlling the output inverter of a microsource in a distributed energy resource system is disclosed. Embodiments of the invention include using unit or zone power controllers that reduce the operating frequency of the inverter to increase its unit output power. Preferred embodiments includes methods wherein the inverter reaches maximum output power and minimum operating frequency at the same time, and further comprising using a voltage controller implementing a voltage vs. reactive current droop. Other aspects of this embodiment relate to an inverter that implements such methods, and a microsource containing such an inverter. These methods can be extended to control inverters in a plurality of microsources, organized in a single zone or in a plurality of zones.
TL;DR: In this paper, a method and system for applying addressing voltages to pixels of a display involves receiving input data including an indication of an addressing voltage impulse to be applied to a pixel via an electrode.
Abstract: A method and system for applying addressing voltages to pixels of a display involves receiving input data. The input data includes an indication of an addressing voltage impulse to be applied to a pixel via an electrode. One or more voltage sources are selected, to provide the addressing voltage impulse. The one or more voltage sources each have a pre-selected voltage. The selected one or more voltage sources are electrically connected to an electrode to apply the addressing voltage impulse to the pixel.
TL;DR: In this paper, display driver circuits for driving an organic light emitting diode display, particularly a passive matrix display with greater efficiency are described, where the display includes at least one electroluminescent display element, and the driver includes a substantially constant current generator for driving the display element.
Abstract: Display driver circuits for driving an organic light emitting diode display, particularly a passive matrix display with greater efficiency are described. The display includes at least one electroluminescent display element, and the driver includes at least one substantially constant current generator for driving the display element. The display driver control circuitry includes a drive voltage sensor for sensing a voltage on a first line in which the current is regulated by the constant current generator; and a voltage controller coupled to the drive voltage sensor for controlling the voltage of a supply for the constant current generator in response to said sensed voltage, and configured to control the supply voltage to increase the efficiency of said display driver.
TL;DR: In this paper, an energy supply system includes a solar panel to generate an input voltage from solar energy; a battery; an alternating current (AC) voltage booster coupled to the solar panel, receiving the input voltage; and a DC regulator coupled with the AC voltage booster to charge the battery.
Abstract: A charger includes an alternating current (AC) voltage booster coupled to an input voltage; and a DC regulator coupled to the AC voltage booster to charge a battery. An energy supply system includes a solar panel to generate an input voltage from solar energy; a battery; an alternating current (AC) voltage booster coupled to the solar panel to receive the input voltage; and a DC regulator coupled to the AC voltage booster to charge the battery.
TL;DR: In this article, a bias current sink is used to produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes, which can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
Abstract: The present invention provides a primary-side regulated PWM controller with improved load regulation. In every PWM cycle, a built-in feedback voltage samples and holds a flyback voltage from the auxiliary winding of the transformer via a sampling switch and generates a feedback voltage accordingly. A bias current sink pulls a bias current that is proportional to the feedback voltage. Via a detection resistor, the bias current will produce a voltage drop to compensate the voltage drop of an output rectifying diode as the output load changes. According to the present invention, the bias current can enable the PWM controller to regulate the output voltage very precisely without using a secondary feedback circuit.
TL;DR: In this paper, the authors proposed a new concept of restoration technique to inject minimum energy during DVR compensation, which is based on the definition of voltage tolerance of the load, and some particular disturbances can be corrected with less amount of energy discharge than those of conventional methods.
TL;DR: In this paper, a PWM controller with an adaptive load and a feedback synthesizer is used to control the output voltage and output current of the power supply without the feedback control circuit in the secondary side of the transformer.
Abstract: A PWM controller according to the present invention provides a technique to control the output voltage and output current of the power supply without the feedback control circuit in the secondary side of the transformer. In order to achieve better regulation, an adaptive load and a feedback synthesizer are equipped into the PWM controller, which associated with the auxiliary winding of the transformer regulate the output voltage of the power supply as a constant. Furthermore, a programmable power limiter in the PWM controller controls the power that is delivered from the primary side to the output of the power supply. The threshold of the power limit is varied in accordance with the change of output voltage. Because the output power is the function of the output voltage of the power supply, a constant current output is realized when the output current of the power supply is greater than a maximum value.
TL;DR: A voltage regulator as mentioned in this paper includes an input terminal adapted for being coupled to an input voltage and an output terminal adapted to a load, and a digital controller which drives the first switch to close the switch when the error voltage is less than a first preset value of voltage.
Abstract: A voltage regulator includes an input terminal adapted for being coupled to an input voltage and an output terminal adapted for being coupled to a load. The voltage regulator includes a first switch adapted for selectively coupling to the input terminal and to the output terminal, a current sensor for measuring an output current flowing towards the output terminal, a voltage sensor for measuring the output voltage from the output terminal, and a digital controller which drives the first switch. The controller closes the first switch when the error voltage is less than a first preset value of voltage and opens the first switch when the output current is greater than a first preset value of current.
TL;DR: In this paper, a power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage, which is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.
Abstract: A power management system includes a voltage booster in combination with a voltage regulator to provide a regulated output voltage. The voltage provided to the voltage regulator is used to selectively enable/disable the doubling functionality of the voltage booster to increase power conversion efficiency.
TL;DR: In this article, an SRAM array coupled to row peripheral circuitry by a word line and coupled to column peripherals by bit lines is presented, and a sleep mode voltage controller is configured to provide both an array high supply voltage V ADD that is lower than a high operating voltage V DD and an array low supply voltage (ASS) that is higher than a low operating voltage (SS).
Abstract: An SRAM device and a method of operating an SRAM device. In one embodiment, the SRAM device includes (1) an SRAM array coupled to row peripheral circuitry by a word line and coupled to column peripheral circuitry by bit lines and (2) a sleep mode voltage controller configured to provide both an array high supply voltage V ADD that is lower than a high operating voltage V DD and an array low supply voltage V ASS that is higher than a low operating voltage V SS to the SRAM array during a sleep mode.
TL;DR: In this article, an SRAM array and a power-down voltage controller are coupled to SRAM and the peripheral circuitry to reduce leakage current of the SRAM arrays and the peripherals during sleep mode.
Abstract: An SRAM device and a method of powering-down an SRAM device. In one embodiment, the SRAM device includes (1) an SRAM array, (2) peripheral circuitry coupled to the SRAM array having voltage domains defined by a boundary and (3) a power-down voltage controller coupled to the SRAM array and the peripheral circuitry that separately regulates voltages of the SRAM array and the peripheral circuitry to reduce leakage current of the SRAM array and the peripheral circuitry at the boundary during a sleep mode.
TL;DR: In this paper, a high efficiency hybrid power supply system that permits a power type power supply device such as a capacitor to be utilized effectively, and that makes it possible to even the burden on an energy type power-supply device such a storage cell is presented.
Abstract: It is an object of the present invention to provide a high efficiency hybrid power supply system that permits a power type power supply device such as a capacitor to be utilized effectively, and that makes it possible to even the burden on an energy type power supply device such as a storage cell. A capacitor 21 is connected to system voltage lines 26 and 27 which are connected to a load 30 , and a body formed by a serial connection between a large-capacity storage cell 22 and the output terminal of a voltage controller 23 is connected in parallel with this capacitor 21 . The voltage Vb of the storage cell 22 is substantially constant. The voltage controller 23 is a DC/DC converter, for example, the output voltage Vv of which is variable. A system controller 25 changes the system voltage Vs by changing the output voltage Vv of the voltage controller 23 . When a large amount of electric power is to be supplied to the load 30 , energy is rapidly discharged from the capacitor 21 and supplied to the load 30 by lowering the system voltage Vs. When a large amount of electric power is to be fed back from the load 30 , energy from the load 30 is rapidly absorbed by the capacitor 21 by raising the system voltage Vs.
TL;DR: In this article, the authors present a voltage adjustment system that facilitates maintenance of processor speed by voltage level adjustment, which includes a speed analysis component that compares an actual speed of a processing unit to a directed speed.
Abstract: The present invention facilitates maintenance of processor speed by voltage level adjustment. In one embodiment, a present invention voltage adjustment system includes a speed analysis component that compares an actual speed of a processing unit to a directed speed. If the actual speed is lower than the directed speed, a voltage control component directs offset adjustments in a voltage level of a power signal to the processor. For example, the voltage control component directs an increases in a voltage level of a power signal. The voltage level can be altered to compensate for variations in hardware tolerance variations. In one embodiment of the present invention, a voltage sensor measures the actual voltage of the processing unit.
TL;DR: In this paper, a data processing system is provided having a processor (46) which generates control signals for controlling further circuits, such as a clock generator and voltage controller (6), to operate so as to support a desired performance level of the processor.
Abstract: A data processing system is provided having a processor (46) which generates control signals for controlling further circuits, such as a clock generator (4) and voltage controller (6), to operate so as to support a desired performance level of the processor. Whilst changing between performance levels, the further circuits are capable of supporting intermediate levels of operation and the processor exploits these by operating at those intermediate levels pending the final target level being reached.
TL;DR: In this article, a PFM switching controller is provided to generate a pFM switching signal for converting a DC voltage source to an output voltage, and an OFF-time prolonging circuit prolongs the minimum off-time in response to the feedback signal.
Abstract: In a pulse frequency modulated (PFM) voltage regulator, a PFM switching controller is provided to generate a PFM switching signal for converting a DC voltage source to an output voltage. A minimum OFF-time controller provides the PFM switching signal with a minimum OFF-time. In response to the output voltage, a feedback circuit generates a feedback signal. When the output voltage is lower than a predetermined target voltage, an OFF-time prolonging circuit prolongs the minimum OFF-time in response to the feedback signal. In other words, a time of delivering energy to a capacitor from an inductor may be prolonged by the OFF-time prolonging circuit. Therefore, a ripple of the output voltage is effectively reduced when the PFM voltage regulator is operated in a heavy loading condition.
TL;DR: In this article, the linear section forms a control signal that is used by the non-linear section to change the value of the intermediate voltage as the output voltage changes to keep the differential voltage across the linear sections low.
Abstract: A power supply system includes a non-linear section that provides an intermediate voltage. A linear section receives the intermediate voltage and generates the output voltage. The linear section forms a control signal that is used by the non-linear section to change the value of the intermediate voltage as the output voltage changes to keep the differential voltage across the linear section low.
TL;DR: In this paper, a power converter operating in all four voltage-current quadrants includes an input voltage source (14), an output current independent of an output voltage and a switching arrangement (12, 16, 18, and 20 ) enabling an output terminal (26 ) to be in common with an input terminal.
Abstract: A power converter ( 10 ) operating in all four voltage-current quadrants includes an input voltage source ( 14 ), an output current independent of an output voltage and a switching arrangement ( 12, 16, 18, and 20 ) enabling an output terminal ( 26 ) to be in common with an input terminal. The output voltage can be unconstrained by an input voltage from the input voltage source.
TL;DR: In this article, a voltage margin testing system incorporated in an electronic system, such as, a computer system (eg, a server), having a plurality of components for at least some of which voltage margin test is required.
Abstract: The present invention provides a voltage margin testing system incorporated in an electronic system, such as, a computer system (eg, a server), having a plurality of components for at least some of which voltage margin testing is required A voltage margin testing of the invention can include a controller, such as a Baseboard Management Controller (BMC), internal to the computer system and a digital voltage adjuster, eg, a digital potentiometer, that is in communication with the controller The voltage adjuster can effect generation of one or more test voltages, for example, by varying resistance in a feedback circuitry of a regulator whose output voltage is applied to system components, for application to the components in response to commands from the controller
TL;DR: In this paper, an integrated receiver decoder for receiving digitally modulated signals from a satellite is described, which includes a tuner, a demodulator, a low-noise block (LNB) controller, a voltage controller and a voltage selector implemented within a single monolithic integrated circuit device.
Abstract: An integrated receiver decoder for receiving digitally modulated signals from a satellite is disclosed. The receiver includes a tuner, a demodulator, a low-noise block (LNB) controller, a voltage controller and a voltage selector implemented within a single monolithic integrated circuit device. The tuner amplifies and filters satellite signals received from a directional receiver antenna. The demodulator, which is coupled to the tuner, demodulates and decodes the received satellite signals. The LNB controller generates and detects a modulated tone to facilitate communications between the receiver and an LNB feed attached to the directional receiver antenna. The voltage selector directs the voltage controller to provide a control signal for controlling an external voltage regulator to generate a variable voltage to the LNB feed attached to the directional receiver antenna.
TL;DR: In this paper, a digital control system and method for use in switching type voltage regulators measures the rate of the change and the magnitude of the output voltage to change not only the pulse width but also the frequency of the pulses.
Abstract: A digital control system and method for use in switching type voltage regulators measures the rate of the change and the magnitude of the output voltage to change not only the pulse width but also the frequency of the pulses. A voltage regulator according to the present invention creates a more stable output voltage and responds more quickly to sudden changes in current load than prior analog and digitally controlled systems.
TL;DR: In this paper, the authors present a method for controlling a power supply, the method comprising: forming a front-end to the power supply and programming the controller to control the digital-to-analog circuits to send a user defined output reference voltage and a user-defined over voltage protection reference voltage to power supply.
Abstract: A method for controlling a power supply, the method comprising: forming a front-end to the power supply, the front-end comprising a plurality of digital-to-analog circuits under control of a controller; and programming the controller to control the digital-to-analog circuits to send a user-defined output reference voltage and a user-defined over voltage protection reference voltage to the power supply.
TL;DR: In this article, a digital mirror device (DMD) projector including a voltage-controllable light source, a color wheel with color filters, an image controller, a photo-sensor, and a voltage controller is described.
Abstract: A digital mirror device (DMD) projector including: a voltage-controllable light source; a color wheel with color filters; a DMD panel having a plurality of mirror elements each being controlled so as to be put in a first inclination and a second inclination states and reflecting light fed from the light source through any one of the color filters while being put in the first inclination state, as the image light, in a first direction, and reflecting light fed through any one of the color filters while being put in the second inclination state in a second direction; an image controller to control so as to put the mirror elements in the first or the second inclination state according to a gray level signal; a photo-sensor being placed in such a position where the light reflected from the mirror elements is incident when the mirror elements is in the second inclination state and, whereby the photo-sensor receives the reflected light and converts the received light to a voltage; a reference voltage source to generate a predetermined reference voltage; and a voltage controller to compare the predetermined reference voltage generated in the reference voltage source with the voltage output from the photo-sensor, and to control the amount of the light fed from the light source so that the voltage is matched to the predetermined reference voltage.
TL;DR: In this article, a power controller (10, 70) forms a pass-through zone of output voltages and switches the output transistors (42, 58) to form the output voltage.
Abstract: A power controller (10, 70) forms a pass-through zone of output voltages. When the output voltage is between an upper limit and lower limit of the pass-through zone, the power controller (10, 70) continuously connects the input voltage to the output to form the output voltage. When the output voltage is above the upper limit or below the lower limit of the pass-through zone, the power controller (10, 70) switches the output transistors (42, 58) to form the output voltage.
TL;DR: In this paper, the authors discuss the change in the shape and magnitude of voltage dip during its propagation from the faulted voltage level down to the equipment terminals, both balanced and unbalanced voltage dips are discussed by presenting theoretical considerations and measurements.
Abstract: Voltage dips at the terminals of sensitive equipment are often due to faults that occur at a much higher voltage level. Even though the load current is small compared to the fault current, the changes in load current during and after the fault still make that the voltage at the equipment terminals is different from the voltage at the faulted voltage level. This paper discusses the change in the shape and magnitude of the voltage dip during its propagation from the faulted voltage level down to the equipment terminals. Both balanced and unbalanced voltage dips are discussed by presenting theoretical considerations and measurements. A quantitative model is derived for induction-motor load; for other types of load a qualitative analysis is given. Studies of voltage-dip propagation due to symmetrical and non-symmetrical faults can be simplified using symmetrical components and the related dip characteristics "characteristic voltage" and "PN-factor".
TL;DR: Simulation results show that both voltage regulation and system stability enhancement can be achieved with this proposed controller regardless of the system operating conditions.
Abstract: A new decentralized nonlinear voltage controller for multimachine power systems is proposed in this paper. The nonlinear n-machine power system model is first linearized and decoupled over the whole operating region by using the direct feedback linearization (DFL) technique. Then a decentralized nonlinear voltage controller is developed by use of the robust control theory. Performance of the proposed controller in a three-machine example system is simulated. The simulation results show that both voltage regulation and system stability enhancement can be achieved with this proposed controller regardless of the system operating conditions.
TL;DR: A new control strategy is proposed to improve electromagnetic torque at starting, according to the relationship that the electromagnetic torque of the induction motors is inversely proportional to the ac power supply frequency, and reducing the supply frequency can improve the starting torque.
Abstract: Thyristorized soft starters are being used as induction motor starters in fan or pump drives, etc, the principle of which is based on the control of variable voltage and constant frequency. One of the demerits of the soft starters is that a small reduction in voltage produces a considerable drop in electromagnetic torque, which may cause the motor with loads failure to start. A new control strategy is proposed to improve electromagnetic torque at starting. According to the relationship that the electromagnetic torque of the induction motors is inversely proportional to the ac power supply frequency, reducing the supply frequency can improve the starting torque. Based on the fixed main circuit of soft starters, the strategy defines the triggering instants of soft starter thyristors to include or omit partial half cycles of the ac power supply. Therefore, the discrete variable frequency voltage and current applied to the motor are obtained. In fact, the new discrete frequencies are the ones of the fundamental components of the generated voltage and current. For all the subharmonic frequencies, in order to obtain most positive torque, the system is properly unbalanced, using the method of symmetrical components to choose the most positive sequence of the initial phase angle combination of three phases. The strategy similar to variable voltage variable frequency inverters gets the motor to produce low impact of current and high torque. Applying this strategy combining with the method of soft start allows the induction motor to start with full loads. The proposed strategy has been verified experimentally on a laboratory machine using a 32-b DSP-based soft starter-fed induction motor drive system, and proved to have good starting torque and current performance.
TL;DR: In this paper, the bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop, and reducing the bias currents increases the off-time of the switching period.
Abstract: A modulator of a PWM controller is provided for saving power and reducing acoustic noise in the light load and no load conditions. The maximum on-time is kept as a constant and a bias current of the oscillator in the PWM controller is moderated to achieve the off-time modulation. The bias current is a function of the supply voltage and the feedback voltage, which is derived from a voltage feedback loop. A threshold voltage defines the level of the light load. A limit voltage defines the low level of the supply voltage. A bias current synthesizer generates the bias current. Reducing the bias current increases the off-time of the switching period. Once the feedback voltage is decreased lower than the threshold voltage, the bias current is reduced linearly and the off-time of the switching period is increased gradually. When the supply voltage is lower than the limit voltage, the bias current increases and determines a maximum off-time of the switching period. Keeping the maximum on-time as a constant and increasing the switching period by only increasing the off-time prevents magnetic components, such as inductors and transformers, from being saturated. Furthermore, a control circuit disables the oscillator as the PWM frequency may fall into the audio band, therefore the acoustic noise can be greatly reduced in the light load and no load conditions.
TL;DR: In this paper, a modified hysteresis current controller for the control of a PWM rectifier is presented, where the controller parameters are designed in the discrete-time domain.
Abstract: A modified hysteresis current controller for the control of a PWM rectifier is presented. Mathematical modelling and control of the PWM rectifier is described. Controller parameters are designed in the discrete-time domain. A comparison study between a conventional hysteresis current controller and the modified hysteresis current controller is presented. Various simulation results are obtained and verified experimentally.