About: Volatile memory is a research topic. Over the lifetime, 5193 publications have been published within this topic receiving 73033 citations. The topic is also known as: volatile storage & temporary memory.
TL;DR: A mass storage system made of flash electrically erasable and programmable read only memory (EEPROM) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory.
Abstract: A mass storage system made of flash electrically erasable and programmable read only memory (“EEPROM”) cells organized into blocks, the blocks in turn being grouped into memory banks, is managed to even out the numbers of erase and rewrite cycles experienced by the memory banks in order to extend the service lifetime of the memory system. Since this type of memory cell becomes unusable after a finite number of erase and rewrite cycles, although in the tens of thousands of cycles, uneven use of the memory banks is avoided so that the entire memory does not become inoperative because one of its banks has reached its end of life while others of the banks are little used. Relative use of the memory banks is monitored and, in response to detection of uneven use, have their physical addresses periodically swapped for each other in order to even out their use over the lifetime of the memory.
TL;DR: In this article, a flash nonvolatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead.
Abstract: A flash non-volatile memory system that normally operates its memory cells in multiple storage states is provided with the ability to operate some selected or all of its memory cell blocks in two states instead. The two states are selected to be the furthest separated of the multiple states, thereby providing an increased margin during two state operation. This allows faster programming and a longer operational life of the memory cells being operated in two states when it is more desirable to have these advantages than the increased density of data storage that multi-state operation provides.
TL;DR: In this paper, the authors propose deferring execution of some of the corrective action when the memory system has other high priority operations to perform, in order to balance the sometimes conflicting needs to maintain data integrity and system performance.
Abstract: In order to maintain the integrity of data stored in a flash memory that are susceptible to being disturbed by operations in adjacent regions of the memory, disturb events cause the data to be read, corrected and re-written before becoming so corrupted that valid data cannot be recovered. The sometimes conflicting needs to maintain data integrity and system performance are balanced by deferring execution of some of the corrective action when the memory system has other high priority operations to perform. In a memory system utilizing very large units of erase, the corrective process is executed in a manner that is consistent with efficiently rewriting an amount of data much less than the capacity of a unit of erase.
TL;DR: In this paper, an integrated circuit component comprising a non-volatile memory for storing a uniquely designated key pair (11, 12), an authentication device certificate (80) and a manufacturer public key (16) along with cryptographic algorithms, a processor for executing the cryptographic algorithms in order to process information inputted into the Integrated Circuit component and for transmitting the processed information into volatile memory and a random number generator for generating the uniquely designated public key pair internally within the Integrated circuit component.
Abstract: An integrated circuit component for enforcing licensing restrictions. Such enforcement is performed through remote transmission of access privileges for executing a licensed program from the integrated circuit component to another similar component. The integrated circuit component comprising a non-volatile memory for storing a uniquely designated key pair (11, 12), an authentication device certificate (80) and a manufacturer public key (16) along with cryptographic algorithms, a processor for executing the cryptographic algorithms in order to process information inputted into the integrated circuit component and for transmitting the processed information into volatile memory and a random number generator for generating the uniquely designated key pair internally within the integrated circuit component.
TL;DR: A study of the runtime environment for programs on RFID-scale devices; an energy-aware state checkpointing system for these devices that is implemented for the MSP430 family of microcontrollers; and a trace-driven simulator of transiently powered RFIDs.
Abstract: Transiently powered computing devices such as RFID tags, kinetic energy harvesters, and smart cards typically rely on programs that complete a task under tight time constraints before energy starvation leads to complete loss of volatile memory. Mementos is a software system that transforms general-purpose programs into interruptible computations that are protected from frequent power losses by automatic, energy-aware state checkpointing. Mementos comprises a collection of optimization passes for the LLVM compiler infrastructure and a linkable library that exercises hardware support for energy measurement while managing state checkpoints stored in nonvolatile memory. We evaluate Mementos against diverse test cases in a trace-driven simulator of transiently powered RFID-scale devices. Although Mementos's energy checks increase run time when energy is plentiful, they allow Mementos to safely suspend execution when energy dwindles, effectively spreading computation across zero or more power failures. This paper's contributions are: a study of the runtime environment for programs on RFID-scale devices; an energy-aware state checkpointing system for these devices that is implemented for the MSP430 family of microcontrollers; and a trace-driven simulator of transiently powered RFID-scale devices.