Showing papers on "Unit testing published in 1995"
9 Aug 1995
TL;DR: A reverse engineering based model called Object Relation Diagram (ORD), which is generated from analyzing the C++ source code of an object oriented program, is presented and a test strategy, called test order, for unit testing and integration testing of object oriented programs is described.
Abstract: The complexity and interdependencies of an object oriented program makes testing of such programs difficult. We present a reverse engineering based model called Object Relation Diagram (ORD), which is generated from analyzing the C++ source code of an object oriented program. An ORD is a directed graph in which the vertices represent the object classes and the edges represent the relationships among the object classes. Based on the ORD, a test strategy, called test order, for unit testing and integration testing of object oriented programs is described. The test order algorithm uses topological sorting and clusters of strongly connected subgraphs of the ORD. It computes the optimal test order in the sense that the effort required to construct the test stubs to simulate the untested classes/member functions is minimum. We show the savings of the test strategy through statistics of the InterViews library.
77 citations
Patent•
27 Jun 1995
TL;DR: In this paper, an integrated database for storing relating information for mutually relating all the results obtained in respective development phases is presented. But the database is not designed for the analysis of the related results.
Abstract: PURPOSE: To provide the information of the related result in accordance with corrected contents at the time of correcting an arbitrary result by providing an integrated database for storing relating information for mutually relating all the results obtained in respective development phases. CONSTITUTION: A typical source material database 110 stores all the results in the respective development phases of system development to be the objects of template preparation such as system constitution, function design, source code, object code, execution format, unit test specification, unit test result, combination test specification, combination test result, overall test specification and overall test result. Besides, a relating database 112 stores the information of relating between all the data stored in the routine material database 110 and a non routine material database 113. Then, all the results provided in the development phases are related so that the related module can be detected and presented in the case of changing a certain module of a software to be developed.
23 citations
1 Jul 1995
TL;DR: This document provides a description of the verification testing that has been performed on the initial version of ARESTCT (V1.0) and shows that AREST-CT works properly and in accordance with design specifications.
Abstract: The Analyzer for Radionuclide Source-Term with Chemical Transport (AREST-CT) is a scientific computer code designed for performance assessments of engineered barrier system (EBS) concepts for the underground storage of nuclear waste, including high-level, intermediate, and low-level wastes The AREST-CT code has features for analyzing the degradation of and release of radionuclides from the waste form, chemical reactions that depend on time and space, and transport of the waste and other products through the EBS This document provides a description of the verification testing that has been performed on the initial version of ARESTCT (V10) Software verification is the process of confirming that the models and algorithms have been correctly implemented into a computer code Software verification for V10 consisted of testing the individual modules (unit tests) and a test of the fully-coupled model (integration testing) The integration test was done by comparing the results from AREST-CT with the results from the reactive transport code CIRFA The test problem consisted of a 1-D analysis of the release, transport, and precipitation of {sup 99}{Tc} in an idealized LLW disposal system All verification tests showed that AREST-CT works properly and in accordance with design specifications
9 citations
TL;DR: An approach is presented called the direct test access method, for constructing software unit testing tools which provide the same capabilities as the automated test drivers but avoids the overhead of constructing stubs.
Abstract: Software unit testing studies how to test a portion of a program, called a software unit, which may be a procedure, a function or a collection of procedures or functions. Automated test drivers have been used to control the execution of the unit under test. When using test drivers, software stubs need to be constructed to replace all procedures called by the unit under test as the unit has been isolated from its operational environment. However, the automatic construction of stubs have not yet been achieved, and manual production of stubs proves to be difficult and time-consuming. An approach is presented called the direct test access method, for constructing software unit testing tools which provide the same capabilities as the automated test drivers but avoids the overhead of constructing stubs.
4 citations
TL;DR: A basic reliability analysis method that is beneficial to fusion component test planning is discussed and calculations based on the Bayesian approach indicate a possible saving on the test time requirement.
4 citations
Patent•
[...]
31 Mar 1995
TL;DR: In this article, the authors present a test taking into consideration of temperature characteristics of the semiconductor element mounted on a unit, and a heat source body is provided on the prescribed place of the unit as a temperature condition setting means.
Abstract: PURPOSE:To conduct a test taking into consideration of temperature characteristics of the semiconductor element mounted on a unit. CONSTITUTION:In the testing of a single unit having a plurality of semiconductor elements, a unit is mounted on a device, a means, having the temperature condition equal to the temperature of each semiconductor element in actual operational condition, is provided, the temperature of each semiconductor element of the unit is set at the prescribed temperature, and the unit is tested. A heat source body is provided on the prescribed place of the unit as a temperature condition setting means, the heat source body is controlled from outside, and the temperature of each semiconductor element is set at the prescribed temperature. Also, as a temperature condition setting meansm, the temperature of each semiconductor element is set at the prescribed temperature by operating a logical circuit which constitutes the prescribed semiconductor element in the unit. A scanning chain is used as a means to operate the prescribed logical circuit in the unit.
1 citations
Patent•
5 Jun 1995
TL;DR: A software unit development and test methodology in which a software application or project is dividing into conceptual units is described in this paper. But this methodology is not applicable to our case. But it is similar to the one described in this paper in that each unit is first developed and debugged in an isolated testing environment which simulates the actual testing environment through test conditions.
Abstract: A software unit development and test methodology in which a software application or project is dividing into conceptual units. Each unit is first developed and debugged in an isolated testing environment which simulates the actual testing environment through test conditions. Following unit testing, other tested units are incrementally combined and tested in a similar isolated manner. Automatic generation of a testing environment and development system driving debugging and testing software, for measuring testing completeness, and for verifying correctness of future development and maintenance efforts are provided.
1 citations
Patent•
7 Mar 1995
TL;DR: In this article, the authors proposed to reduce a circuit board and to delete a cost by eliminating a special purpose switch as starting means for trially starting at the time of installation.
Abstract: PURPOSE:To reduce a circuit board and to delete a cost by eliminating a special purpose switch as starting means for trially starting at the time of installation CONSTITUTION:An inspection input terminal 16 for a board test and an inspection input terminal 17 for an indoor unit test are provided on an indoor unit circuit board 10 When a predetermined signal is applied to either the terminal 16 or 17, one of the board and indoor unit tests is conducted When the signal is applied to the both terminals 16, 17, a trial operation mode is started When no signal is applied to both the terminals 16, 17, an ordinary operation mode is selected A circuit board of an outdoor unit is similar
1 citations