TL;DR: In this article, a plurality of host processors share access to a peripheral data storage subsystem and each has program means for controlling asynchronous operations of the subsystem, and means are provided for identifying the secondary devices to all of the host processors.
Abstract: A plurality of host processors share access to a peripheral data storage subsystem and each have program means for controlling asynchronous operations of the subsystem. Control blocks in each of the host processors are addressably linked together for enabling inferred access to a unit control block (UCB) for any of a plurality of peripheral devices in the subsystem. The subsystem selectively groups some of the devices such that only devices designated as primary devices are addressably accessible by host processor application programs. Other devices in the respective groups are secondary devices and are accessed by the subsystem whenever the primary devices in the same group cannot perform a host processor commanded operation. Means are provided for identifying the secondary devices to all of the host processors.
TL;DR: In this article, a method for performing block management in a controller of a Flash memory having multiple channels is presented. But this method is applied to a controller with multiple channels and it is not applicable to a single-channel controller.
Abstract: A method for performing block management is provided. The method is applied to a controller of a Flash memory having multiple channels. The Flash memory includes a plurality of blocks respectively corresponding to the channels. The method includes: temporarily storing at least one index of at least one good block that is not grouped into any meta block into a spare good block table, where the good block is a block that is not determined as a bad block within the plurality of blocks; and when it is detected that a specific block corresponding to a specific channel within blocks currently grouped into meta blocks is a bad block, dynamically updating the spare good block table for use of block management. In particular, when needed, the good block is utilized for replacing a block grouped into a meta block. An associated memory device and a controller thereof are also provided.
TL;DR: In this article, a data processing system for concurrent requests for access to peripheral devices up to the number of subchannels available for handling input/output operations is described, where a computer system provides a plurality of sub-channels and affiliated unit control blocks for input and output operations between main storage and the peripheral devices.
Abstract: Disclosed is a data processing system for presenting concurrent requests for access to peripheral devices up to the number of subchannels available for handling input/output operations. A computer system provides a plurality of subchannels and affiliated unit control blocks for input/output operations between main storage and the peripheral devices. The unit control blocks comprise two groups, including a first dedicated to the peripheral devices and a second group available for dynamic association with the peripheral devices on a demand basis. The unit control blocks are termed base unit control blocks and alias unit control blocks, respectively. Upon system initialization, alias unit control blocks for a given logical subsystem are linked in a free pool. To initiate an input/output operation a program executing on the CPU first queries a base unit control block for a target peripheral device to determine its availability. If available, the base unit control block and associated base subchannel are used for the input/output operation. If not, determination is made if an alias unit control block may be used and if any are available. Responsive to affirmative determinations, an alias unit control block is removed from the free pool and is linked to the base unit control device for the target peripheral device in an exposure chain. The CPU then places a channel program in main storage including a prefix channel command for binding an alias address for the alias unit control block with a particular device. This is done by passing the binding command to a controller for the target peripheral device which maintains tables of affiliations between aliases and peripheral devices on a path group basis. After binding, the input/output operation proceeds in conventional fashion.
TL;DR: Test subchannel as discussed by the authors is a new instruction called Test Subchannel that prevents the other processor from operating with outdated status information in the unit control block (UCB) of the same processor.
Abstract: A new instruction called Test Subchannel assures that one processor will not begin an I/O operation with device status information that has been outdated by an operation of another processor. When a device has status to present, a status pending bit and an interruption pending bit are set in the channel subsystem and an interruption request is made. When a processor accepts an interruption, the channel system resets the interruption pending bit but not the status pending bit. The processor that accepts the interruption updates the unit control block (UCB) in main store and resets the status pending bit in the subchannel unless the UCB has been locked by another processor that is starting an I/O operation on the same device. This invention prevents the other processor from operating with outdated status information in the UCB. A processor that has locked the UCB uses Test Subchannel to test the Status Pending bit in the subchannel. If status is pending, the processor executes a routine to update the UCB. Optionally, when a processor that is handling an interruption finds the UCB locked, it sets a flag bit in the UCB lock word. Before a processor resets the UCB lock, it checks the lock word and executes the Test Subchannel instruction if the flag is set.
TL;DR: In this article, a method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks is presented, where each I/O request interrupts an operating system to assign a base and related unit control block to the input and output requests after which control transfers back to the operating system.
Abstract: A method for enabling overlapped input/output requests to a logical device using assigned and parallel access unit control blocks Each I/O request interrupts an operating system to assign a base and related unit control block to the input/output requests In addition a parallel access control block is associated with each unit control block for a logical volume and a parallel access main control block is established with a logical volume through which each of the base and related unit control block can be identified An input/output request to a logical device interrupts the operating system to assign one of the base and one of the assigned unit control blocks to the input/output requests after which control transfers back to the operating system At a disk storage facility, the input/output request is located in a table with other input/output requests and corresponding parameters The disk array storage facility tests the parameters for each new input/output request to determine which of a plurality of control functions will be performed