Thread safety

Abstract: Closely related processing threads within a process in a multiprocessor system are collected into thread groups which are globally scheduled as a group based on the thread group structure's priority and scheduling parameters. The thread group structure maintains collective timeslice and CPU accounting for all threads in the group. Within each thread group, each individual thread has a local scheduling priority for scheduling among the threads in its group. The system utilizes a hierarchy of processing levels and run queues to facilitate affining thread groups with processors or groups of processors when possible. The system will tend to balance out the workload among system processors and will migrate threads groups up and down through processing levels to increase cache hits and overall performance. The system is periodically reset to avoid long term unbalanced operation conditions.

Abstract: A method, system, and computer-readable medium is described for providing a thread messaging system for communications between users of thread client computing devices. The thread messaging system provides significant benefits over existing prior art messaging systems such as email, IM, chat and bulletin boards. In some situations, the thread messaging system supports each user having multiple simultaneous threads of conversation with distinct user-specified groups of multiple other users, maintains communications in a persistent and virtual manner such that a user can specify communications for threads regardless of their own connectivity status or that of the intended recipients and can receive thread communications from others that occurred while the user was not connected, and allows the communications for each thread conversation to be displayed distinctly and simultaneously such that the contents of current and previous communications are displayed together in a uniform manner and in a user-specified order.

Abstract: A system and method for performing computer processing operations in a data processing system includes a multithreaded processor (110) and thread switch logic (400) The multithreaded processor (110) is capable of switching between two or more threads of instructions which can be independently executed Each thread has a corresponding state in a thread state register (440) depending on its execution status The thread switch logic contains a thread switch control register (410) to store the conditions upon which a thread switch can occur Upon the occurrence of a thread switch event, the state and priority of all threads are dynamically interrogated to determine which thread should be the active thread executing the processor The thread switch logic has a time-out register (430) which forces a thread switch when execution of the active thread in the multithreaded processor exceeds a programmable period of time Thread switch logic also has a forward progress count register (420) to prevent repetitive unproductive thread switching between threads in the multithreaded processor Thread switch logic also is responsive to a thread switch manager (460) capable of changing the priority of the different threads and thus superseding thread switch events

Abstract: A simultaneous multi-threaded architecture combines OS priority information with thread execution heuristics to provide dynamic priorities for selecting thread instructions for processing. The dynamic priority of a thread is determined by adjusting a heuristic measure of the thread's execution dynamics with a priority-dependent scaling function determined from the OS priority of the thread. An SMT processor includes logic for calculating a scaling function for each thread scheduled on the processor, tracking the threads' heuristics, and combing the scaling function and heuristic information into a dynamic priority for each thread. Instructions are selected for execution from among the scheduled threads according to the threads' dynamic priorities.