About: Ternary computer is a research topic. Over the lifetime, 17 publications have been published within this topic receiving 74 citations. The topic is also known as: trinary computer.
TL;DR: The prototype circuits described in the paper have been developed primarily to show the feasibility of a ternary computer or data-processing equipment, and it is expected that further engineering design will be needed to construct a large higher-speed machine.
Abstract: The advantages that can be obtained from using a ternary or higher-order system are enumerated. The various techniques using semiconductor, devices are described with particular reference to the ternary system, and the circuits that have been developed from these techniques are reviewed. The prototype circuits described in the paper have been developed primarily to show the feasibility of a ternary computer or data-processing equipment, and it is expected that further engineering design will be needed to construct a large higher-speed machine. The main types of logic are surveyed, and the principal operators required to mechanize a system are discussed.
TL;DR: This paper is an attempt to investigate the performance aspects of using ternary RF to open the gate of more contributions and research in the direction of full ternaries computer architecture.
TL;DR: An implementation of a general purpose CPU using signed-digit arithmetic by exploiting memristors in order to implement multi-value registers is proposed and it is shown that a break-even point exists at which signed- digit algorithms outperform conventional binary arithmetic operations.
Abstract: The carry propagation of arithmetic operations is one of the major shortcomings of common binary number encodings as the two’s complement. Signed-digit arithmetic allows the addition of two numbers...
TL;DR: The final evaluation will consist of monitoring the types of operations performed, the number of instructions used in each category, memory utilization, etc, which will then be compared to binary machines performing the same type of work.
Abstract: has an advantage over similar binary machines. The logic connectives used, as well as other instructions, will be monitored and their usefulness evaluated. The way in which the machine is implemented, i.e. in Version 1.2 of a level-1 machine on top of QM-I (5) dictates the procedures of evaluation. As there was no attempt to utilize in any optimal way the binary hardware on which we are emulating, there is no point v~atsoever to do any speed comparisons between the ternary and binary computers. The final evaluation will consist of monitoring the types of operations performed, the number of instructions used in each category, memory utilization, etc. These numbers will then be compared to binary machines performing the same type of work. Relations between these two sets of data will be used for evaluation purposes. We now refer the reader to Part II where the results of our preliminary work are reported.
TL;DR: An example of the use of the ternary computer proposed for the real-time digital filters is presented to illustrate how microprogramming and user programming can easily be done and execution steps can substantially be reduced, unlike the corresponding binary computer.
Abstract: Real-time digital filters which have several advantages over analog filters are known as a very important digital-signal processor. This paper provides a summary of the design features of a special-purpose microprogram-controlled ternary computer suited for realizing the real-time digital filters by programming. Many advantages of the ternary number system are effectively employed for the ternary computer in hardware and software. Particular emphasis is placed on the use of the ternary adder with three inputs and the microprogram structure based on ternary logic. An example of the use of the ternary computer proposed for the real-time digital filters is presented to illustrate how microprogramming and user programming can easily be done and execution steps can substantially be reduced, unlike the corresponding binary computer.