Abstract: A general approach for constructing chaotic synchronized dynamical systems is discussed that is based on a decomposition of given systems into active and passive parts. As a possible application the chapter considers an improved encoding method where the information signal is injected into the dynamical system of the transmitter. Furthermore, it highlights how to design in a systematic way high-dimensional synchronized systems that may be used for efficient hyperchaotic encoding of information. Synchronization of periodic signals is a well-known phenomenon in physics, engineering, and many other scientific disciplines.

Abstract: A data processing method for synchronizing the data records of a plurality of disparate databases, in which a status file is provided containing data records representative of the contents of data records existing in the disparate databases at a prior synchronization Data records from at least a first and a second of the plurality of databases are compared to corresponding data records of the status file to determine whether data records of the plurality of databases have changed or been deleted since the prior synchronization, or whether there are new data records since the earlier synchronization Based on the outcome of the comparing step, decisions are made as to how to update the data records of the first and second databases Finally, the status file is updated so that its data records are representative of the contents of the data records of the first and second databases after they have been updated

Abstract: A method for synchronizing the data between two separate computer systems is described. In a first aspect of the invention, the method includes the step of identifying each record stored in the memory of the first computer system that is intended to be synchronized. The records are identified with a unique identification indicia and an indicia that indicates the last time that the record was altered. Using the time of the last synchronization information, each of the selected records that was added to or deleted from one of the computer systems since the last synchronization is identified and added to or deleted from the other computer system. Further, each of the records that was modified on one computer system is modified on the other. If conflicting actions have occurred on the two computer systems, then the conflicts are handled in accordance with a predetermined protocol. In a preferred aspect, a synchronization list is created that identifies each of these additions, deletions and modifications and either prioritizes them in accordance with the protocol or informs the user of the conflicts.

Abstract: A system and method for distributing real-time, compressed, digital video data from a video library composed of multiple mass storage devices through a digital video data server to large numbers of viewers via distribution networks is provided. The server obtains selected frames of video data for viewer-requested programs from high-speed memory using a buffering strategy, replicates the data via a multi-cast technique for each viewer listed in an assigned synchronization group and forwards the data to each viewer's site where it is decompressed, decoded, and converted for display on a television monitor or computer display. Each viewer maintains interactive control over the transmission of the digital video data.

Abstract: In a live multicast in a LAN environment, audio and video streams are transmitted from a source station to a plurality of receiving stations. A technique is disclosed for synchronizing the audio decoder clock at each receiving station with the source station. A technique is also disclosed for synchronizing the audio and video data streams received at each receiving station.

Abstract: Strength gains have been attributed to neural adaptations such as alterations in recruitment, rate coding, synchronization of motor units, reflex potentiation, co-contraction of antagonists, and synergistic muscle activity. Although most training studies show increases in EMG, a few have sho

Abstract: Effective memory hierarchy utilization is critical to the performance of modern multiprocessor architectures. We have developed the first compiler system that fully automatically parallelizes sequential programs and changes the original array layouts to improve memory system performance. Our optimization algorithm consists of two steps. The first step chooses the parallelization and computation assignment such that synchronization and data sharing are minimized. The second step then restructures the layout of the data in the shared address space with an algorithm that is based on a new data transformation framework. We ran our compiler on a set of application programs and measured their performance on the Stanford DASH multiprocessor. Our results show that the compiler can effectively optimize parallelism in conjunction with memory subsystem performance.

Abstract: The problems addressed apply to both throughput-oriented and speedup-oriented multiprocessor systems, either at the user level or the operating-system level. basic definitions are provided. Communication and synchronization are briefly explained, and hardware-level and software-level synchronization mechanisms are discussed. The cache coherence problem is examined, and solutions are described. Strong and weak ordering of events is considered. The user interface is discussed. >

Abstract: A finite state model for the specification and validation of communication protocols is considered. The concept of “direct coupling” between interactiing finite state components is used to describe a hierarchical structure of protocol layers. The paper discusses different aspects of protocol validation, some verification tools based on the finite state formalism, and the basic limitations of the finite state modelling of protocols. An “empty medium abstraction” is proposed for reducing the complexity of the overall system description. The concept of “adjoint states” can be useful for summarizing the relative synchronization between the communicating system components. These concepts are applied to the analysis of a simple alternating bit protocol, and to the X.25 call set-up and clearing procedures. The analysis of X.25 shows that the procedures are stable in respect to intermittant perturbations in the synchronization of the interface introduced for different reasons, including occasional packet loss. However, on very rare occasions, an undesirable cyclic behaviour could be encountered.

Abstract: Protocols for synchronizing data streams should be highly adaptive with regard to both changing network conditions as well as to individual user needs. The Adaptive Synchronization Protocol we are going to describe in this paper supports any type of distribution of the stream group to be synchronized. It incorporates buffer level control mechanisms allowing an immediate reaction on overflow or underflow situations. Moreover, the proposed mechanism is flexible enough to support a variety of synchronization policies and allows to switch them dynamically during presentation. Since control messages are only exchanged when the network conditions actually change, the message overhead of the protocol is very low.

Abstract: A method and a structure for providing electronic mail, facsimile transmission and file transfer maintain a data base in which the communication parameters of a local computer are maintained separately from the communication parameters of a remote computer which communicates the local computer. The data base includes an electronic address book in which a method and a structure are provided for specifying person, group, computer, calling card and service data. The person type data includes specification of a preference for data, or facsimile transmission. Service information are efficiently added because of modularly designed application programming interface. A method and a structure are also provided to allow synchronization between files residing on different computers.

Abstract: How does an evolutionary process interact with a decentralized distributed system in order to produce globally coordinated behavior Using a genetic algorithm GA to evolve cellular au tomata CAs we show that the evolution of spontaneous synchronization one type of emergent coordination takes advantage of the underlying medium s potential to form embedded particles The particles typically phase defects between synchronous regions are designed by the evolu tionary process to resolve frustrations in the global phase We describe in detail one typical solution discovered by the GA delineating the discovered synchronization algorithm in terms of embedded particles and their interactions We also use the particle level description to analyze the evolutionary sequence by which this solution was discovered Our results have implications both for understanding emergent collective behavior in natural systems and for the automatic programming of decentralized spatially extended multiprocessor systems

Abstract: An indexing method allows a viewer to control the mode of delivery of program material while minimizing the time offset between audio and video data so that the viewer does not perceive a time delay between the audio and video. Video data frames may be grouped together into units referred to as "Groups of Pictures" (GOP's) comprising one or more frames. Synchronization is performed by correlating audio frames of the audio data with GOP's of the video data. When jumping to various points in an item of program material, this indexing method ensures that a jump is made to the beginning of a GOP. To prevent audio data from being "out of sync", the audio data must be correlated with the corresponding GOP. To do so, an index file for the video data is constructed, and then the video data index file is used to construct an index file for the corresponding audio data. The audio data index file is constructed so that, for the set of audio frames that most closely span the time interval spanned by each GOP, each audio frame in that set is assigned the same atom-relative byte position, which is the beginning of the set of audio frames.

Abstract: A language-based approach to deterministic execution debugging of concurrent Ada programs is presented. The approach is to define synchronization (SYN)-sequences of a concurrent Ada program in terms of Ada language constructs and to replay such SYN-sequences without the need for system-dependent debugging tools. It is shown how to define a SYN-sequence of a concurrent Ada program in order to provide sufficient information for deterministic execution. It is also shown how to transform a concurrent Ada program P so that the SYN-sequences of previous executions of P can be replayed. This transformation adds an Ada task to P that controls program execution by synchronizing with the original tasks in P. A brief description is given of the implementation of tools supporting deterministic execution debugging of concurrent Ada programs. >

Abstract: A performance evaluation of the Symmetry multiprocessor system revealed that the synchronization mechanism did not perform well for highly contested locks, like those found in certain parallel applications. Several software synchronization mechanisms were developed and evaluated, using a hardware monitor, on the Symmetry multiprocessor system; the mechanisms were to reduce contention for the lock. The mechanisms remain valuable even when changes are made to the hardware synchronization mechanism to improve support for highly contested locks. The Symmetry architecture is described, and a number of lock algorithms and their use of hardware resources are examined. The performance of each lock is observed from the perspective of both the program itself and the total system performance. >

Abstract: Protocol testing for the purpose of certifying the implementation's adherence to the protocol specification can be done with a test architecture consisting of remote tester and local responder processes generating specific input stimuli, called test sequences, and observing the output produced by the implementation under test. It is possible to adapt test sequence generation techniques for finite state machines, such as transition tour, characterization, and checking sequence methods, to generate test sequences for protocols specified as incomplete finite state machines. For certain test sequences, the tester or responder processes are forced to consider the timing of an interaction in which they have not taken part; these test sequences are called nonsynchronizable. The three test sequence generation algorithms are modified to obtain synchronizable test sequences. The checking of a given protocol for intrinsic synchronization problems is also discussed. Complexities of synchronizable test sequence generation algorithms are given and complete testing of a protocol is shown to be infeasible. To extend the applicability of the characterization and checking sequences, different methods are proposed to enhance the protocol specifications: special test input interactions are defined and a methodology is developed to complete the protocol specifications.

Abstract: We present a method for the joint estimation of timing and carrier-frequency offset in Orthogonal frequency-division multiplexing (OFDM) systems. We show that it is possible to generate these estim ...

Abstract: A method and an apparatus for synchronization of a first set of data with a second set of data at the record level. A memory stores a change detection mechanism for generating a Change List for the first and second sets of data. The Change List lists the changes made at the record level to the first and second sets of data. The memory also has a Synchronization mechanism for making the first set of data and the second set of data equivalent by using the information in the Change List generated by the Change Detection Mechanism. A processor runs the Change Detection mechanism and the Synchronization mechanism.

Abstract: A method and system for enhanced system management operations in a superscalar data processing system. Those supervisory level instructions which execute selected privileged operations within protected memory space are first identified as not requiring a full context synchronization. Each time execution of such an instruction is initiated an enable special access (ESA) instruction is executed as an entry point to that instruction or group of instructions. A portion of the machine state register for the data processing system is stored and the machine state register is then modified as follows: a problem bit is set, changing the execution privilege state to "supervisor;" external interrupts are disabled; and access privilege state bit is set; and, a special access mode bit is set, allowing execution of special instructions. The instructions which execute the selected privileged operations within the protected memory space are then executed. A disable special access (DSA) instruction is then executed which restores the bits within the machine state register which were modified during the ESA instruction. The ESA and DSA instructions are implemented without modifying the instruction stream by utilizing user level procedure calls, thereby reducing the overhead of the branch table necessary to determine the desired execution path.

Abstract: The present invention is directed to providing frequency hopping medium access control among a plurality of nodes (e.g., communication stations) in a wireless communication system. The present invention is directed to decentralized control of synchronization among the plural nodes. In accordance with exemplary embodiments, a node used to control synchronization of the communication system can switch from a first master node to a second master node.

Abstract: A method of and system for optimizing process utilization in a shared resource environment that avoids holding system processes while requests are queued or waiting for system resources. Information about a waiting request is retained in control structures; then the same process that frees a resource is utilized to respond to queued requests for that resource. The effect is to minimize the retention and/or allocation of processes and their associated system resource requirements. The same method is applied to the synchronization of interprocess communications.

Abstract: Concurrent programs are more difficult to test than sequential programs because of non-deterministic behavior. An execution of a concurrent program non-deterministically exercises a sequence of synchronization events called a synchronization sequence (or SYN-sequence). Non-deterministic testing of a concurrent program P is to execute P with a given input many times in order to exercise distinct SYN-sequences. In this paper, we present a new testing approach called reachability testing. If every execution of P with input X terminates, reachability testing of P with input X derives and executes all possible SYN-sequences of P with input X. We show how to perform reachability testing of concurrent programs using read and write operations. Also, we present results of empirical studies comparing reachability and non-deterministic testing. Our results indicate that reachability testing has advantages over non-deterministic testing.

Abstract: In complex networks schedule synchronization has a major importance when constructing timetables. Restrictions in this field are based on the structure and the complexity of the existing network, different headways, and the origin-destination pairs of the demand structure. With respect to service quality one main objective coming to mind consists of minimizing the sum of all waiting times of all passengers at transfer nodes in a transit system. Furthermore, modifications of such an objective function incorporating the maximum waiting time may have to be observed as well as interrelationships between service level and operating cost.

Abstract: The supervisory control of nondeterministic discrete event dynamical systems (DEDSs) with driven events in the setting of prioritized synchronization and trajectory models introduced by Heymann are studied. Prioritized synchronization captures the notions of controllable, uncontrollable, and driven events in a natural way, and the authors use it for constructing supervisory controllers. The trajectory model is used for characterizing the behavior of nondeterministic DEDSs since it is a sufficiently detailed model (in contrast to the less detailed language or failures models), and serves as a language congruence with respect to the operation of prioritized synchronization. Results concerning controllability and observability in this general setting are obtained.

Abstract: The timeliness and synchronization requirements of multimedia data demand e&ient buffer management and disk access schemes for multimedia database systems. The data rates involved are very high and despite the developmenl of eficient storage and retrieval strategies, disk I/O is a potential bottleneck, which limits the number of concurrent sessions supported by a system. This calls for more eficient use of data that has already been brought into the buffer. We introduce the notion of continuous media caching, which is a simple and novel technique where data that have been played back by a user are preserved in a controlled fashion for use by subsequent users requesting the same data. We present heuristics to determine when continuous media sharing is beneficial and describe the bufler management algorithms. Simulation studies indicate that our technique substantially improves the performance of multimedia database applications where data sharing is possible.

Abstract: We consider the problem of clock synchronization in a system with uncertain message delays and clocks with bounded drift. To analyze this classical problem, we introduce the concept of synchronization graphs, and show that the tightest achievable synchronization at any given execution is characterized by the distances in the synchronization graph for that execution. Synchronization graphs are derived from information which is locally available for computation at the processors (local time of events and system specification), and can therefore be used by distributed algorithms. Using synchronization graphs, we obtain the first optimal on-line distributed algorithms for external clock synchronization, where the task of all processors is to estimate the reading of the local clock of a distinguished processor. The algorithms are optimal for all executions, rather than only for worst cases. The algorithm for systems with arbitrarily drifting clocks has high overhead; we prove that this phenomenon is unavoidable, namely any optimal general algorithm for external synchronization has unbounded space complexity. For systems with drift-free clocks (i.e., clocks that run at the rate of real time), we present a particularly simple and efficient algorithm. We also present results for internal synchronization, where the task of the processors in the system is to generate a synchronized "tick." Our approach is robust in the sense it encompasses various system models, such as point-to-point or broadcast channels, communication links that may lose, duplicate and re-order messages, and crashing processors. In addition, synchronization graphs can be used to detect corrupted information. (Copies available exclusively from MIT Libraries, Rm. 14-0551, Cambridge, MA 02139-4307. Ph. 617-253-5668; Fax 617-253-1690.)

Abstract: An I/O channel controller implements coherency and synchronization mechanisms, which allow the I/O channel controller to provide fully coherent direct memory access operations on a multiprocessor system bus, without implementing a retry protocol. This is made possible by performing delayed cache invalidates for real-time cache coherency conflicts between processors and I/O devices. Furthermore, I/O DMA writes occur real-time to the memory system and without the traditional Read With Intent to Modify (RWITM) operations. Completion of PIO operations has been coupled to the completion of I/O DMA writes operations in order to provide 'seamless' I/O synchronization with respect to processor execution. An IOCC implementation has been described which benefits from those techniques by significantly reducing design complexity.

Abstract: A digital communications receiver provides joint MLSE equalization and diversity combining. A plurality of diversity branches are processed to produce complex receive data samples and synchronization information. Channel estimators then form channel estimates from the data samples and synchronization information. The data samples and channel estimates are then used by pre-processors to produce metric multipliers. Finally, the metric multipliers are combined with hypothesized data sequences to generate and accumulate metrics using a sequence estimation algorithm to produce a demodulated data stream.