TL;DR: A method of constructing concurrent programs in which the synchronization skeleton of the program is automatically synthesized from a high-level (branching time) Temporal Logic specification.
Abstract: We Propose a method of constructing concurrent programs in which the synchronization skeletonof the program is automatically synthesized from a high-level (branching time) Temporal Logic specification. The synchronization skeleton is an abstraction of the actual program where detail irrelevant to synchronization is suppressed. For example, in the synchronization skeleton for a solution to the critical section problem each process's critical section may be viewed as a single node since the internal structure of the critical section is unimportant. Most solutions to synchronization problems in the literature are in fact given as synchronization skeletons. Because synchronization skeletons are in general finite state, the propositional version of Temporal Logic can be used to specify their properties.
TL;DR: A method of constructing concurrent programs in which the synchronization skeleton of the program is automatically synthesized from a (branching time) temporal logic specification by using a decision procedure based on the finite model property of the logic.
TL;DR: A framework allowing a unified and rigorous definition of the semantics of concurrency is proposed, which introduces processes as elements of process domains which are obtained as solutions of domain equations in the sense of Scott and Plotkin.
Abstract: A framework allowing a unified and rigorous definition of the semantics of concurrency is proposed. The mathematical model introduces processes as elements of process domains which are obtained as solutions of domain equations in the sense of Scott and Plotkin. Techniques of metric topology as proposed, e.g., by Nivat are used to solve such equations. Processes are then used as meanings of statements in languages with concurrency. Three main concepts are treated, viz. parallellism (arbitrary interleaving of sequences of elementary actions), synchronization, and communication. These notions are embedded in languages which also feature classical sequential concepts such as assignment, tests, iteration or recursion, and guarded commands. In the definitions, a sequence of process domains of increasing complexity is used. The languages discussed include Milner's calculus for communicating systems and Hoare's communicating sequential processes. The paper concludes with a section with brief remarks on miscellaneous notions in concurrency, and two appendices with mathematical details.
TL;DR: Synchronization of intercostal motoneurones was studied by the construction of cross‐correlation histograms which related the firing times of paired groups of efferent inspiratory or expiratory discharges recorded from filaments of the external or internal nerves of anaesthetized or decerebrate cats.
Abstract: 1. Synchronization of intercostal motoneurones was studied by the construction of cross‐correlation histograms which related the firing times of paired groups of efferent inspiratory or expiratory discharges recorded from filaments of the external or internal nerves of anaesthetized or decerebrate cats.
TL;DR: Computer performance models of parallel processing systems in which a job subdivides into two or more tasks at some point during its execution are considered and an approximate solution method is developed.
Abstract: Computer performance models of parallel processing systems in which a job subdivides into two or more tasks at some point during its execution are considered. Except for queueing effects, the tasks execute independently of one another and do not require synchronization. An approximate solution method is developed and results of the approximation are compared to those of simulations. Bounds on the performance improvement due to overlap are derived.
TL;DR: In this article, a camera system is provided that permits memory data dedicated to particular camera accessories to be transmitted to the camera body for enabling the operation of the camera, which can carry dedicated information or variable information.
Abstract: A camera system is provided that permits memory data dedicated to particular camera accessories to be transmitted to the camera body for enabling the operation of the camera. The camera accessories can carry dedicated information or variable information to the camera body. Synchronization between the camera accessory and the camera body can be provided by a train of clock pulses. Information can be programmed in a fixed memory circuit to insure that only a particular accessory so designated will provide information to the camera body to prevent any erroneous inputting of data from a plurality of camera accessories that are contemplated for use with a particular camera body.
TL;DR: This work shall consider the class of those systems of sequential processes which communicate deterministically by means of buffers and discuss proof rules to decide whether or not deadlocks can occur in a given system of this type.
Abstract: Co-operation of sequential processes is one of the most widely known organization principles for distributed systems. We shall consider the class of those systems of sequential processes which communicate deterministically by means of buffers and discuss proof rules to decide whether or not deadlocks can occur in a given system of this type.
TL;DR: A fragment of ADA abstracting the communication and synchronization part is studied, emphasizing the justice and fairness aspects of the selection mechanisms.
Abstract: A fragment of ADA abstracting the communication and synchronization part is studied. An operational semantics for this fragment is given, emphasizing the justice and fairness aspects of the selection mechanisms. An appropriate notion of fairness is shown to be equivalent to the explicit entry-queues proposed in the reference manual. Proof rules for invariance and liveness properties are given and illustrated on an example. The proof rules are based on temporal logic.
TL;DR: A data transmission network includes a number of access controllers connected to a central hub that includes an arbitrator to select only one access controller for data transmission to prevent collision of data packets.
Abstract: A data transmission network includes a number of access controllers connected to a central hub. The hub includes an arbitrator to select only one access controller for data transmission. Upon selection of one controller all other controllers are disabled to prevent collision of data packets. An interlock prevents enablement of a disabled controller until the data packet received by the transmitter has terminated to prevent transmission of part of a data packet. Synchronization between the data and a master clock is obtained by an initial coarse synchronization and a subsequent fine synchronization. The coarse synchronization is obtained by generation of a number of identical signals with a time delay between each signal. A clock pulse latches to one of the signal paths to provide the initial coarse synchronization.
TL;DR: In this paper, a TV receiver is adapted to display either the regularly broadcast video signals or videotext information, which may be used to replace the normal video internal synchronization signals.
Abstract: A TV receiver is adapted to display either the regularly broadcast video signals or videotext information. The video signals contain their own internal synchronization signals. The videotext information requires locally generated synchronization signals which may be used to replace the normal video internal synchronization signals. The invention provides means for switching between the normally broadcast and the internally generated synchronization signals.
TL;DR: In this paper, the authors propose a distributed access control of peer elements by which, requests for access to data of a specified currency are permitted and conformation of updated data is selectively deferred by use of a control procedure implemented at each node (10, 12, 14) and utilizing a status and control table (in SAC 60, 62, 64), which describes that node's view of the status for shared data items at other nodes.
Abstract: Dynamic replication of data under distributed system control to control the utilization of resources in a multiprocessing, distributed data base system avoiding a central node maintained control, or synchronization by immediately conforming all copies of an updated data file, is achieved by a distributed access control of peer elements by which, requests for access to data of a specified currency are permitted and conformation of updated data is selectively deferred by use of a control procedure implemented at each node (10, 12, 14) and utilizing a status and control table (in SAC 60, 62, 64) at each node which describes that node's view of the status for shared data items at other nodes. Access, including copying and deletion permission, is granted, when a search of the local table discloses no conflict. If conflict is disclosed, messages are exchanged with all involved nodes until the local table discloses no conflict.
TL;DR: This paper investigates strategies for dynamically reconfiguring shared memory multiprocessor systems that are subject to common memory faults and unpredictable processor deaths and presents a general distributed algorithm which enables the processors in such a system to exchange the local information needed to reach a consensus on system reconfiguration.
Abstract: In this paper, we investigate strategies for dynamically reconfiguring shared memory multiprocessor systems that are subject to common memory faults and unpredictable processor deaths. These strategies aim at determining a communication page, i.e., a page of common memory that can be used by a group of processors for storing crucial common resources such as global locks for synchronization and global data structures for voting algorithms. To ensure system reliability, the reconfiguration strategies must be distributed so that each processor independently arrives at exactly the same choice. This type of reconfiguration strategy is currently used in the STAGE operating system on the PLURIBUS multiprocessor [5]. We analyze the weak points of the PLURIBUS algorithm and examine alternative strategies satisfying optimization criteria such as maximization of the number of processors and the number of common memory pages in the reconfigured system. We also present a general distributed algorithm which enables the processors in such a system to exchange the local information that is needed to reach a consensus on system reconfiguration.
TL;DR: The difficulties of solving complex synchronizing problems by using standard semaphore primitives lead us to propose that special-purpose synchronization techniques should be supported by a judicious combination of hardware/microcode and software routines.
Abstract: A weakness in the reader priority solution proposed by Curtois, Heymans and Paraas for the problem of synchronizing concurrent readers and writers is described and an improvement is explained. The difficulties of solving complex synchronizing problems by using standard semaphore primitives, as illustrated by this example, lead us to propose that special-purpose synchronization techniques should be supported by a judicious combination of hardware/microcode and software routines. We then describe an efficient solution for the reader/writer problem which is easy to understand, to implement and to use.
TL;DR: This paper presents a technique for modeling and analyzing the performance of software for an MIMD (Multiple Instruction Multiple Data) computer and the detection and alleviation of performance bottlenecks is facilitated.
Abstract: This paper presents a technique for modeling and analyzing the performance of software for an MIMD (Multiple Instruction Multiple Data) computer. The models can be used as an alternative to experimentation for the evaluation of various algorithms and different degrees of parallelism. They can also be used to study the tradeoffs involved in increasing the amount of parallel computation at the expense of increased overhead for synchronization and communication. The detection and alleviation of performance bottlenecks is facilitated.
TL;DR: The operating system kernel of a multiprocessor system based on 16 bit microcomputers is described, which makes available a virtual machine where processes allocated on different processors are executed in parallel, while processes which reside on the same processor are execution in a multitasking environment.
TL;DR: In this article, the same recording head or heads may be employed to record both an information signal and a synchronization word signal, where at least two recording heads provide overlap intervals in the recording of the information signal, and the synchronized word signal may be recorded in such overlap intervals.
Abstract: The same recording head or heads may be employed to record both an information signal and a synchronization word signal. Where at least two recording heads provide overlap intervals in the recording of the information signal, the synchronization word signal may be recorded in such overlap intervals. Upon playback, the synchronization word signal may be employed to control at least part of the reproduction of the information signal.
TL;DR: An 80 kbit/s ping-pong method which has 72 k bit/s capacity for the voice and data communications is presented, so as to provide such integrated services.
Abstract: With recent digital technique progress, digitalization is spreading to subscriber loop systems. In-house systems will be digitalized earlier than other systems. In in-house networks, a pingpong method, especially an 80 kbit/s ping-pong method, using an existing cable pair, is superior to other digital transmission methods due to the sample system structure. For office use, a digital subscriber terminal is required to offer integrated services. However, the already reported 80 kbit/s method is insufficient to provide simultaneous and independent integrated services. This paper presents an 80 kbit/s ping-pong method which has 72 kbit/s capacity for the voice and data communications, so as to provide such integrated services. Furthermore, an experimental integrated terminal, which has simple synchronization circuits, is described.
TL;DR: In this paper, the synchronization frame is stored in one of a pair of memories and this frame is read out of the memory onto a communication channel between the local and remote stations, at the same time the other memory is used to store the frame that is normally used for data communication.
Abstract: METHOD AND APPARATUS FOR ESTABLISHING FRAME SYNCHRONIZATION Abstract A synchronization technique in which the frame used for synchronization is different from that used for normal data communication and contains few if any bits other than those used to establish synchronization. At the beginning of data communication, the synchronization frame is stored in one of a pair of memories and this frame is read out of the memory onto a communication channel between the local and remote stations. At the same time, the other memory is used to store the frame that is normally used for data communication. When synchronization is established between the local and remote stations, signal generation shifts from the first memory to the second; and the second memory immediately begins to produce the channel select and overhead signals needed for data communication. Illustratively, the synchronization frame contains less than one hundred bits and in a preferred embodiment a total of forty-eight bits are used for synchronization. As a result, synchroni-zation can be achieved much more quickly than in systems where three full data frames must be transmitted to achieve synchronization. Moreover, since few, if any, of the bits present in the synchronization frame are customer-originated data bits or EIA-type control signals, false synchronization problems are avoided.
TL;DR: This work has chosen a particular application of the rendezvous that it expects to occur frequently and has programmed several alternative implementations for this use of the Rendezvous, and measured the performance of these implementations on the multiprocessor Cm* to ascertain actual costs.
Abstract: Reasonably efficient implementations of Ada task synchronization, in particular the rendezvous, will be crucial to the successful application of Ada. There are a variety of different implementations of rendezvous semantics, each with a different cost. In addition, some implementations can only be used under constrained circumstances. In the exercise reported here we have chosen a particular application of the rendezvous that we expect to occur frequently and we have programmed several alternative implementations for this use of the rendezvous. We have measured the performance of these implementations on the multiprocessor Cm* to ascertain actual costs of the various implementations on an existing multiple processor engine. Our measurements are reported here.
TL;DR: The technique can be used to solve synchronization problems directly, to implement new synchronization mechanisms, and to construct distributed versions of existing synchronization mechanisms.
Abstract: A technique for solving synchronization problems in distributed programs is described. Use of this technique in environments in which processes may fail is discussed. The technique can be used to solve synchronization problems directly, to implement new synchronization mechanisms (which are presumably well suited for use in distributed programs), and to construct distributed versions of existing synchronization mechanisms. Use of the technique is illustrated with implementations of distributed semaphores and a conditional message-passing facility.
TL;DR: The occurrence of a transmission error which produces a multibit error burst in the decrypted version of a composite speech and synchronization encrypted signal using a one-bit cipher feedback or similar encryption scheme is detected by monitoring the dec encrypted signal to detect synchronization errors.
Abstract: The occurrence of a transmission error which produces a multibit error burst in the decrypted version of a composite speech and synchronization encrypted signal using a one-bit cipher feedback or similar encryption scheme is detected by monitoring the decrypted signal to detect synchronization errors. Upon detection of an error, the decrypted speech output is muted or disabled to avoid the annoying audible click otherwise produced.
TL;DR: Criteria of new algorithms which can belong to other classes which will allow the degree of concurrency to be increased are presented.
Abstract: The classes of serializable histories for distributed database systems are studied. The study is based on the model of partially redundant distributed database and multiple read/write transactions. Classes are identified by timing constraints on the system history. Five classes (g2pl, l2pl, dcp, dsto, and dss) are described. A hierarchy among these classes has been established. Since most of the existing synchronization algorithms are for class g2pl or class dsto and the concurrency provided by these two classes is low, characteristics of new algorithms which can belong to other classes are investigated. Specifically, certain system characteristics which will allow the degree of concurrency to be increased are presented. 15 references.
TL;DR: In this paper, the authors proposed a digital data communication system which is able to combine two data streams from two data sources at the transmitter end, transmit the data and then separate the streams to two data ports at the receiver end.
Abstract: This invention provides a digital data communication system which is able to combine two data streams from two data sources at the transmitter end, transmit the data and then separate the streams to two data ports at the receiver end. The system makes use of QAM or PSK modulation, and synchronization between the transmitter and the receiver is maintained by changing the radial component of every other transmitted symbol. At the receiver end the radial components of every other symbols are correlated to detect loss of synchronization. Once such a loss is detected, the receiver is adapted to self-synchronize itself with the transmitter.
TL;DR: In this article, an automatic high speed microfilm searching system is disclosed for locating a desired frame of microfilm, where the index data comprises a sequence of vertically-aligned data bar groups.
Abstract: An automatic high speed microfilm searching system is disclosed for locating a desired frame of microfilm. Each frame consists of information data and index data. The index data comprises a sequence of vertically-aligned data bar groups, each representing a half character of a sequence of characters of a unique index code for the associated frame. A pair of synchronization bars, each half the width of a data bar, is vertically aligned with each data bar group. Additional synchronization pulses both precede and follow the data bar groups. Depending on which direction the microfilm is moving, the leading synchronization bars are sensed by a bar sensing unit on the left or on the right of the viewing screen. Each sensing bar unit comprises a plurality of vertically-aligned data bar sensors and synchronization bar sensors, with three sensors assigned to each vertical bar in a data bar group, and three sensors assigned to reading the synchronization bars. If the data bars are centrally located each of the three synchronization bar sensors senses the leading synchronization bar; if the data bars are high, only one or two of the central and high synchronization bar sensors senses the leading synchronization bar; if the data bars are low, only one or two of the central and low synchronization bar sensors senses the leading synchronization bar. A bar position determining means is responsive to the three synchronization bar sensors to determine whether the data bars are high, centrally positioned or low. The transition between synchronization bar pairs is used to latch the correctly-read character data into storage. After two half characters are stored they are transferred to a computer for comparison with the desired frame index code. When the available frame index code corresponds with the desired frame index code, the microfilm is stopped to project the desired frame onto the viewing screen.
TL;DR: The fundamental problem of synchronizing communication between distributed processes whose speeds vary dynamically, which must be established in matching pairs, is concerns and it is shown how to implement a distributed local scheduler to find these pairs.
Abstract: This paper concerns the fundamental problem of synchronizing communication between distributed processes whose speeds (steps per real time unit) vary dynamically. Communication must be established in matching pairs, which are mutually willing to communicate. We show how to implement a distributed local scheduler to find these pairs. The only means of synchronization are boolean "flag" variables, each of which can be written by only one process and read by at most one other process.No global bounds in the speeds of processes are assumed. Processes with speed zero are considered dead. However, when their speed is nonzero then they execute their programs correctly. Dead processes do not harm our algorithms' performance with respect to pairs of other running processes. When the rate of change of the ratio of speeds of neighbour processes (i.e., relative acceleration) is bounded, then any two of these processes will establish communication within a constant number of steps of the slowest process with high likelihood. Thus our implementation has the property of achieving relative real time response. We can use our techniques to solve other problems such as resource allocation and implementation of parallel languages such as CSP and ADA. Note that we do not have any probability assumptions about the system behavior, although our algorithms use the technique of probabilistic choice.