Symbolic simulation

Abstract: Symbolic trajectory evaluation provides a means to formally verify properties of a sequential system by a modified form of symbolic simulation. The desired system properties are expressed in a notation combining Boolean expressions and the temporal logic ``next-time'''' operator. In its simplest form, each property is expressed as an assertion [ A =< C ], where the antecedent A expresses some assumed conditions on the system state over a bounded time period, and the consequent C expresses conditions that should result. A generalization allows simple invariants to be established and proven automatically. The verifier operates on system models in which the state space is ordered by ``information content''''. By suitable restrictions to the specification notation, we guarantee that for every trajectory formula, there is a unique weakest state trajectory that satisfies it. Therefore, we can verify an assertion [ A =< C ] by simulating the system over the weakest trajectory for A and testing adherence to C. Also, establishing invariants correspond to simple fixed point calculations. This paper presents the general theory underlying symbolic trajectory evaluation. It also illustrates the application of the theory to the task of verifying switch-level circuits as well as more abstract implementations.

Abstract: 1. Introduction to Analog Design Automation.- 1.1. Introduction.- 1.2. Definitions in analog design automation.- 1.3. Characteristics of analog design.- 1.4. Needs for analog circuits and analog design automation.- 1.5. Different analog design approaches and analog silicon compilation.- 1.6. Analog system-level synthesis.- 1.7. Outline of the book.- 2. The Automated Design of Analog Functional Modules.- 2.1. Introduction.- 2.2. Classification of analog module design programs.- 2.3. An automated design methodology for analog modules.- 2.4. The methodology applied to a simple example.- 2.5. Discussion of and comparison with other analog design systems.- 2.6. Conclusions.- 3. Symbolic Simulation of Analog Integrated Circuits.- 3.1. Introduction.- 3.2. Definition and scope of symbolic simulation.- 3.3. Applications of symbolic analysis in analog design.- 3.4. General description of the ISAAC program.- 3.5. Conclusions.- 4. Algorithmic Aspects of Linear Symbolic Simulation.- 4.1. Introduction.- 4.2. Overview of symbolic analysis techniques.- 4.3. The set-up of the linear circuit equations.- 4.4. The symbolic solution of sets of linear equations.- 4.5. Symbolic expression approximation.- 4.6. Performance of the ISAAC program.- 4.7. Conclusions.- 5. Symbolic Distortion Analysis.- 5.1. Introduction.- 5.2. Symbolic noise analysis.- 5.3. Symbolic analysis of harmonic distortion in weakly nonlinear analog circuits.- 5.4. Symbolic sensitivity analysis and zero/pole extraction.- 5.5. Techniques for the hierarchical symbolic analysis of large circuits.- 5.6. Conclusions.- 6. Analog Design Optimization Based on Analytic Models.- 6.1. Introduction.- 6.2. Circuit sizing based on an optimization of analytic models.- 6.3. The analog design formulation in OPTIMAN.- 6.4. Practical design examples.- 6.5. Automated layout generation of analog integrated circuits.- 6.6. Conclusions.- Appendix A. Characterization of a CMOS Two-Stage OPAMP.- References.

Abstract: A methodology for the automatic design optimization of analog integrated circuits is presented. A non-fixed-topology approach is realized by combining the optimization program OPTIMAN with the symbolic simulator ISAAC. After selecting a circuit topology, the user invokes ISAAC to model the circuit. ISAAC generates both exact and simplified analytic expressions, describing the circuit's behavior. The model is then passed to the design optimization program OPTIMAN. This program is based on a generalized formulation of the analog design problem. For the selected topology, the independent design variables are automatically extracted and OPTIMAN sizes all elements to satisfy the performance constraints, thereby optimizing a user-defined design objective. The global optimization method used on the analytic circuit models is simulated annealing. Practical examples show that OPTIMAN quickly designs analog circuits, closely meeting the specifications, and that it is a flexible and reliable design and exploration tool. >

Abstract: At present, designers of real-time systems face a dilemma between expressiveness and automatic verification: if they can specify some aspects of their system in some automaton-based formalism, then automatic verification is possible; but more complex system components may be hard or impossible to express in such decidable formalisms. These more complex components may still be simulated; but there is then little support for their formal analysis. The main goal of Real-Time Maude is to provide a way out of this dilemma, while complementing both decision procedures and simulation tools. Real-Time Maude emphasizes ease and generality of specification, including support for distributed real-time object-based systems. Because of its generality, falling outside of decidable system classes, the formal analyses supported--including symbolic simulation, breadth-first search for failures of safety properties, and model checking of time-bounded temporal logic properties--are in general incomplete (although they are complete for discrete time). These analysis techniques have been shown useful in finding subtle bugs of complex systems, clearly outside the scope of current decision procedures. This paper describes both the semantics of Real-Time Maude specifications, and of the formal analyses supported by the tool. It also explains the tool's pragmatics, both in the use of its features, and in its application to concrete examples.