TL;DR: A composite web page is made up of a plurality of subpages as mentioned in this paper, which allows a user to input data to a Web server in one subpage while interactively displaying a response from the server of the input on another subpage.
Abstract: A composite Web page is made up of a plurality of subpages. It allows a user to input data to a Web server in one subpage while interactively displaying a response from the server of the input on another subpage. When an input is made, an URL is also sent to the server to run a program that updates a database and generates a response. The program also generates a composite Web page incorporating the response in one of the subpages. Each subpage is formed with the use of subtemplates which may contain partially formed text and hypertext markup elements as well as program tags for the server to interpret and execute subprograms upon them. Each subprogram typically produces an output that is written to the tag location in hypertext markup language format. In another embodiment, the subtemplates and the program are sent to the client to construct the interactive Web page there.
TL;DR: In this article, a memory manager responds to selected data access requests by allocating, within the memory local to the requesting CPU, exclusive physical storage space for a data page associated with the requested subpage.
Abstract: A digital data processing apparatus has plural processing cells, each with a memory element that stores data page made up of plural subpages. At least one of the cells includes a CPU that can request access to a data subpage. A memory manager responds to selected data access requests by (i) allocating, within the memory local to the requesting CPU, exclusive physical storage space for a data page associated with the requested subpage, and (ii) storing the requested subpage in that allocated space. The apparatus recombines data pages and deallocates them on the basis of usage and access state. The apparatus also accesses data asynchronously with respect to execution of instructions by the CPU.
TL;DR: In this paper, a network hub responds to network problems by generating traps in conformance with the Simple Network Management Protocol (SNMP), in which the hub includes a Uniform Resource Locator (URL) as a text string incorporated in the trap.
Abstract: A network hub responds to network problems by generating traps in conformance with the Simple Network Management Protocol (SNMP). In generating a trap, the hub includes a Uniform Resource Locator (URL) as a text string incorporated in the trap. The network hub incorporates a server conforming to the HyperText Transfer Protocol (HTTP) used by the World Wide Web. The server has its own home page and the URL incorporated in the trap points to a subpage of that home page. When a network management station receives the trap, the URL is displayed as a hypertext link. When the link is “clicked”, a web browser is activated and is pointed to the URL so that an HTTP “get” command is transmitted. When the hub receives the “get” command, it responds by generating the requested subpage. The subpage is presented as a World Wide Web page with a full presentation of data relating to the event triggering the trap. In addition, the subpage includes active elements (hypertext links, buttons, and/or menu items) that when activated initiate a course of action to address the detection of the network problem.
TL;DR: In this article, a method for determining if writes to a memory subpage are directed to target instructions which have been translated to host instructions in a computer which translates instructions from a target instruction set to a host instruction set is presented.
Abstract: A method for determining if writes to a memory subpage are directed to target instructions which have been translated to host instructions in a computer which translates instructions from a target instruction set to a host instruction set, including steps of detecting a write to a memory subpage storing target instructions which have been translated to host instructions, detecting whether a sub-area of the memory page to which the write is addressed stores target instructions which have been translated, and invalidating host instructions translated from addressed target instructions
TL;DR: In this paper, the authors present an allocation lock that permits only a single transaction to acquire space on a particular page at any one time, which facilitates operations of concurrent transactions at a subpage level (e.g., a row level), and in conjunction with a heap manager can enforce a set of conditions such that prior to a commit stage of a transaction, a space availability for a specific page can be typically assured.
Abstract: Systems and methodologies are provided that employ an allocation lock, which permits only a single transaction to acquire space on a particular page at any one time. The allocation lock of the present invention facilitates operations of concurrent transactions at a subpage level (e.g., a row level), and in conjunction with a heap manager can enforce a set of conditions such that prior to a commit stage of a transaction, a space availability for a particular page can be typically assured (e.g., that transactions operating on various copies of the page do not consume all of storage space on that page), and reorganization of data around the page is mitigated (e.g., that a transaction need not move data around the page for purpose of merging various copies.)