About: Stencil is a research topic. Over the lifetime, 5709 publications have been published within this topic receiving 64156 citations. The topic is also known as: stencilling.
TL;DR: In this article, the authors present finite-difference schemes for the evaluation of first-order, second-order and higher-order derivatives yield improved representation of a range of scales and may be used on nonuniform meshes.
TL;DR: A systematic model of the tradeoff space fundamental to stencil pipelines is presented, a schedule representation which describes concrete points in this space for each stage in an image processing pipeline, and an optimizing compiler for the Halide image processing language that synthesizes high performance implementations from a Halide algorithm and a schedule are presented.
Abstract: Image processing pipelines combine the challenges of stencil computations and stream programs. They are composed of large graphs of different stencil stages, as well as complex reductions, and stages with global or data-dependent access patterns. Because of their complex structure, the performance difference between a naive implementation of a pipeline and an optimized one is often an order of magnitude. Efficient implementations require optimization of both parallelism and locality, but due to the nature of stencils, there is a fundamental tension between parallelism, locality, and introducing redundant recomputation of shared values.We present a systematic model of the tradeoff space fundamental to stencil pipelines, a schedule representation which describes concrete points in this space for each stage in an image processing pipeline, and an optimizing compiler for the Halide image processing language that synthesizes high performance implementations from a Halide algorithm and a schedule. Combining this compiler with stochastic search over the space of schedules enables terse, composable programs to achieve state-of-the-art performance on a wide range of real image processing pipelines, and across different hardware architectures, including multicores with SIMD, and heterogeneous CPU+GPU execution. From simple Halide programs written in a few hours, we demonstrate performance up to 5x faster than hand-tuned C, intrinsics, and CUDA implementations optimized by experts over weeks or months, for image processing applications beyond the reach of past automatic compilers.
TL;DR: In this paper, a spectrum of higher-order schemes is developed to solve the Navier-Stokes equations in finite-difference formulations, and the spectral properties of the differentiation and filtering schemes are examined and guidelines are provided to choose proper filter coefficients.
Abstract: : A spectrum of higher-order schemes is developed to solve the Navier-Stokes equations in finite-difference formulations. Pade type formulas of up to sixth order with a five-point stencil are developed for the difference scheme. Viscous terms are treated by successive applications of the first derivative operator. However, formulas are also derived for use in a mid-point interpolation-differentiation strategy. For numerical stability, up to tenth-order filtering schemes are developed. The spectral properties of the differentiation and filtering schemes are examined and guidelines are provided to choose proper filter coefficients. Special high-order formulas are obtained for differentiation and filtering in the vicinity of boundaries. The coefficients required for systematic implementation of Neumann-type boundary conditions are also presented. A brief description is provided of the manner in which the FDL3DI code is enhanced by coupling the approximately-factored procedure with these compact-difference based algorithms and by incorporating an explicit fourth-order Runge-Kutta scheme.
TL;DR: High-resolution screen printing of pristine graphene is introduced for the rapid fabrication of conductive lines on flexible substrates and provides an efficient method to produce highly flexible graphene electrodes for printed electronics.
Abstract: High-resolution screen printing of pristine graphene is introduced for the rapid fabrication of conductive lines on flexible substrates. Well-defined silicon stencils and viscosity-controlled inks facilitate the preparation of high-quality graphene patterns as narrow as 40 μm. This strategy provides an efficient method to produce highly flexible graphene electrodes for printed electronics.
TL;DR: This solvent-free method can be combined with a wide range of substrates (including biocompatible polymers, homogeneous or nonplanar surfaces, microelectronic chips, and gels), biomolecules, and virtually any adherent cell type.
Abstract: Here we present an inexpensive method to fabricate microscopic cellular cultures, which does not require any surface modification of the substrate prior to cell seeding. The method utilizes a reusable elastomeric stencil (i.e., a membrane containing thru holes) which seals spontaneously against the surface. The stencil is applied to the cell-culture substrate before seeding. During seeding, the stencil prevents the substrate from being exposed to the cell suspension except on the hole areas. After cells are allowed to attach and the stencil is peeled off, cellular islands with a shape similar to the holes remain on the cell-culture substrate. This solvent-free method can be combined with a wide range of substrates (including biocompatible polymers, homogeneous or nonplanar surfaces, microelectronic chips, and gels), biomolecules, and virtually any adherent cell type.