TL;DR: The types of masters that exist within an STEbus system, their modes of operation, and how the system arbiter controls the bus allocation are discussed.
TL;DR: This introductory paper briefly surveys the history of the STEbus, describes the important features of the standard, and considers the benefits of adopting the bus for low- to mid-performance embedded systems.
TL;DR: The paper recommends that the best apparent couplings are between STE (PIO00), VME (P1014) and Futurebus (P896) as well as currently available bus systems with a view to recommendations for use on future projects.
TL;DR: A method for linking the STEbus to VME systems using the VMS bus is described; this method can be extended to link other buses such as the IBM PC bus.