Topic
Soft error
About: Soft error is a research topic. Over the lifetime, 3059 publications have been published within this topic receiving 57128 citations.
Papers published on a yearly basis
Papers
1 Jan 2014
TL;DR: In this paper all error detecting and error correcting mechanisms are studied and best mechanism on the basis of accuracy, complexity and power consumption is selected.
Abstract: In most communication system convolutional encoders are used and AWGN introduces errors during transmission. In this paper all error detecting and error correcting mechanisms are studied and best mechanism on the basis of accuracy, complexity and power consumption is selected. Error detection and correction mechanisms are vital and numerous techniques exist for reducing the effect of bit - errors and trying to ensure that the receiver eventually gets an error free version of the packet. In order to protect memories against MCUs as well as SEUs is to make use of advanced Error detecting and correcting codes that can correct more than one error per word. There should be tradeoff between complexity of hardware and power consumption in decoder. Index Term:- Error correcting codes, error detecting codes, hamming codes, block codes INTRODUCTION: Error detection and correction mechanisms are vital and numerous techniques exist for reducing the effect of bit -errors and trying to ensure that the receiver eventually gets an error free version of the packet. The major techniques used are error detection with Automatic Repeat Request, Forward Error Correction and hybrid forms. Forward Error Correction is the method of transmitting error correction information along with the message. To prevent soft errors from causing data corruption, memories are typically protected with error correction codes. Error correcting codes (ECCs) are commonly used to protect against soft errors and thereby enhance system reliability and data integrity. Single error detecting and single error correcting codes are used for this purpose, these codes are able to correct single bit errors and detect double bit errors in a codeword. The code is often designed first with the goal of minimizing the gap from Shannon capacity and attaining the target error probability. ECC protects against undetected data corruption, and is used in computers where such corruption is unacceptable, as with some scientific and financial computing applications and as file servers. ECC also reduces the number of crashes, particularly unacceptable in multi-user server applications and maximum-availability systems. Error detection is most commonly realized using a suitable hash function (or checksum algorithm). A hash function adds a fixed-length tag to a message, which enables receivers to verify the delivered message by recomputing the tag and comparing it with the one provided.
3,590 citations
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TL;DR: The basic goal in digital communications is to transport bits of information without losing too much information along the way, but the level of information loss that is tolerable/acceptable varies for different applications.
Abstract: The basic goal in digital communications is to transport bits of information without losing too much information along the way. The level of information loss that is tolerable/acceptable varies for different applications. The loss is measured in terms of the bit error rate, or BER. An interesting application that employs error control coding is a system with a storage medium such as a hard disk drive or a compact disc (CD). We can think of the channel as a block that causes errors to occur when a signal passes through it. Regardless of the error source, we can describe the problem as follows: when the transmitted signal arrives at the receiver after passing through the channel, the received data will have some bits that are in error. The system designer would like to incorporate ways to detect and correct these errors. The field that covers such digital processing techniques is known as error control coding.
1,743 citations
23 Jun 2002
TL;DR: An end-to-end model is described and validated that enables us to compute the soft error rates (SER) for existing and future microprocessor-style designs and predicts that the SER per chip of logic circuits will increase nine orders of magnitude from 1992 to 2011 and at that point will be comparable to the SERper chip of unprotected memory elements.
Abstract: This paper examines the effect of technology scaling and microarchitectural trends on the rate of soft errors in CMOS memory and logic circuits. We describe and validate an end-to-end model that enables us to compute the soft error rates (SER) for existing and future microprocessor-style designs. The model captures the effects of two important masking phenomena, electrical masking and latching-window masking, which inhibit soft errors in combinational logic. We quantify the SER due to high-energy neutrons in SRAM cells, latches, and logic circuits for feature sizes from 600 nm to 50 nm and clock periods from 16 to 6 fan-out-of-4 inverter delays. Our model predicts that the SER per chip of logic circuits will increase nine orders of magnitude from 1992 to 2011 and at that point will be comparable to the SER per chip of unprotected memory elements. Our result emphasizes that computer system designers must address the risks of soft errors in logic circuits for future designs.
1,589 citations
TL;DR: In this article, the authors review the types of failure modes for soft errors, the three dominant radiation mechanisms responsible for creating soft errors in terrestrial applications, and how these soft errors are generated by the collection of radiation-induced charge.
Abstract: The once-ephemeral radiation-induced soft error has become a key threat to advanced commercial electronic components and systems. Left unchallenged, soft errors have the potential for inducing the highest failure rate of all other reliability mechanisms combined. This article briefly reviews the types of failure modes for soft errors, the three dominant radiation mechanisms responsible for creating soft errors in terrestrial applications, and how these soft errors are generated by the collection of radiation-induced charge. The soft error sensitivity as a function of technology scaling for various memory and logic components is then presented with a consideration of which applications are most likely to require soft error mitigation.
1,460 citations
TL;DR: In this article, a new physical soft error mechanism in dynamic RAM's and CCD's is proposed, which is caused by the passage of alpha particles through the memory array area.
Abstract: A new physical soft error mechanism in dynamic RAM's and CCD's is the upset of stored data by the passage of alpha particles through the memory array area. The alpha particles are emitted by the radioactive decay of uranium and thorium which are present in parts-per-million levels in packaging materials. When an alpha particle penetrates the die surface, it can create enough electron-hole pairs near a storage node to cause a random, single-bit error. Results of experiments and measurements of alpha activity of materials are reported and a physical model for the soft error is developed. Implications for the future of dynamic memories are also discussed.
941 citations
Related Topics (5)
Performance Metrics
| Year | Papers |
|---|---|
| 2025 | 15 |
| 2024 | 36 |
| 2023 | 65 |
| 2022 | 133 |
| 2021 | 94 |
| 2020 | 116 |