TL;DR: In this article, the authors propose a method and apparatus for synchronizing interface objects of an application's graphic user interface (GUI) with underlying data by specifying data binding properties and validation binding properties.
Abstract: Embodiments of the invention comprise a method and apparatus for synchronizing interface objects of an application's graphic user interface (GUI) with underlying data. A design tool is used in embodiments of the invention to specify an interface object's binding properties. Data binding properties can define an association between an interface object and underlying data for synchronization purposes. In addition, a validation binding can be specified for an interface object that can be used to validate the data entered via the interface object. An expression binding associates an interface object to a plurality of interface objects and/or underlying data sources that contain data used in evaluating an expression the result of which is displayed in the interface object. A query expression binding associates a plurality of interface objects and/or underlying data sources and to an evaluatable expression the result of which is used in a query to retrieve a data source's data. A binding manager manages the bindings (e.g., data, expression and validation bindings) defined at design time or at run time. Further, the binding manager registers with the program code (e.g., instances of object classes) that manages the bound interface objects and underlying data. The binding manager is notified, when a change occurs to an interface object or the underlying data. The binding manager processes the change request to ensure that bound interface objects and/or data sources remain synchronized.
TL;DR: A high-speed interface circuit delivering 660 MB/s data is implemented as a byte-wide I/O bus-interface cell, implementing as a full-custom ASIC library mega-cell, reducing area and power over gate-array approaches.
Abstract: A high-speed interface circuit delivering 660 MB/s data is implemented as a byte-wide I/O bus-interface cell. The interface contains low-swing input receivers, controlled-current output drivers, and clock-recovery circuits. The circuits perform well in noisy environments such as microprocessors, and withstand LdI/dt noise generated in high-inductance packages such as PQFPs. The interface is implemented as a full-custom ASIC library mega-cell, reducing area and power over gate-array approaches. An advanced CAD methodology is used to easily port the analog circuits and high-speed digital circuits in the interface cell to multiple-fabrication process technologies. The cell is used as an interface for ASIC-to-DRAM communication and for ASIC-to-ASIC communication, for point-to-point links and for bused links.
TL;DR: In this article, an echo compensator is used to suppress an echo signal produced by the attachment of the terminal device to the U interface of an ISDN telecommunications network, and a processor system, connected to communication controller and a/b interface component block, programs the echo compensators and the S interface component blocks.
Abstract: A network termination unit to connect a plurality of analog terminals and digital terminals to a U interface of an ISDN telecommunications network. An echo compensator is connected to the U interface to suppress an echo signal produced by the attachment of the terminal device to the U interface. A first bus connects the echo compensator to a communication controller, an a/b interface component block that is compatible with an a/b interface to which an analog terminal is connected, and an S interface component block to which a digital terminal is connected. A processor system, connected to communication controller and a/b interface component block, programs the echo compensator and the S interface component block. B channels of the ISDN telecommunications network are activated and deactivated in response to commands issued by the communication controller. The processor system further evaluates and prepares D channel signalling data for the a/b interface component block.
TL;DR: This paper identifies the important features of the user interface designer's interface and develops a UIMS incorporating these features in its interface.
Abstract: The concepts of a user interface management system (UIMS) and user interface designer have become well known in the user interface and graphics community. Most UIMSs developed so far have concentrated on the efficiency of generating the user interface; the user interface designer's interface has received relatively little attention. We identify the important features of the user interface designer's interface. A UIMS incorporating these features in its interface has been developed, and is described in this paper.