Abstract: As the penetration of renewable energy resources proliferate, inverters have been employed as interface in distributed power systems To achieve expanded power level and system redundancy, parallel connection of inverters has been widely used This paper derives mathematical models to quantitatively evaluate the reliability of parallel inverters under different topologies and control strategies A framework to determine the number of inverters in parallel in terms of reliability and cost optimization is proposed Sensitivity analysis is carried out to identify the impact of parameter variation on system reliability and total cost At last, power densities of different structures are analyzed for a fair comparison

Abstract: This paper describes a five-phase brushless dc (BLDC) motor designed for an electrohydrostatic actuation system (EHA) suited to the thin and optimized wings. The foundation of the design is a motor with fault tolerance and high reliability, compact structure, and low weight. The motor power rating is 12 kW at 12 000 rpm, and a “wet” form of construction is used where hydraulic oil is present in the motor to reduce the number of oil seals of the EHA for enhanced reliability and lifetime. The losses and thermal behavior are evaluated for an optimized design. Fault tolerance for BLDC motors is discussed. A five-phase motor has been manufactured, and test results are presented to validate the design.

Abstract: High-Brightness Light Emitting Diodes (HB-LEDs) are considered the future trend in lighting not only due to their high efficiency and high reliability, but also due to their other outstanding chara...

Abstract: This paper presents a reliability-oriented design (ROD) procedure for three-phase power converters in aircraft applications. These require the highest reliability levels for all its components-as high as space applications; hence the need to maximize the reliability of three-phase power converters, which are in increasing demand and use in commercial and military aircrafts as a result of the more-electric aircraft (MEA) initiative. Specifically, the proposed procedure takes reliability up-front in the design process of power converters, carrying out the design in three steps. First, the identification of critical system components; second, the assessment of reliability factors such as risk analysis, failure mode analysis, and fishbone diagrams; and third, the actual design, which is carried out by minimizing system complexity and stress, and by the use of the most reliable components, materials, and structures. To this end, reliability models were developed for all critical components based on the military handbook MIL-HDBK-217F, and field and vendor data. For verification purposes, the paper includes the ROD of a 60 kW three-phase power converter for aircraft applications together with experimental results of the prototype constructed.

Abstract: While transistor performance and energy efficiency have dramatically improved in recent years, electrical interconnect improvements has failed to keep pace. Recent advances in nanophotonic fabrication have made on-chip optics an attractive alternative. However, system integration challenges remain. In particular, the parameters of on-chip nanophotonic structures are sensitive to fabrication-induced process variation and run-time spatial thermal variation across the die. This work addresses the performance and reliability challenges that arise from this sensitivity to variation. The paper first presents a model predicting the system-level effects of thermal and process variation in nanophotonic networks. It then shows how to optimize many-core system performance and reliability by using run-time techniques to compensate for the thermal and process variation effects.

Abstract: Disclosed are a shift register that shows excellent operation reliability with elements less than those of the conventional structure and a gate driving circuit using the shift register. The gate driving circuit comprises each of a plurality of shift registers sequentially connected and respectively supplying scan signals to a plurality of gate lines of a display device.

Abstract: Sn-Ag-Cu (SAC) alloy is currently recognized as the standard lead-free solder alloy for packaging of interconnects in the electronics industry, and high- Ag-content SAC alloys are the most popular choice. However, this choice has been encumbered by the fragility of the solder joints that has been observed in drop testing as well as the high cost of the Ag itself. Therefore, low-Ag-content SAC alloy was considered as a solution for both issues. However, this approach may compromise the thermal-cycling performance of the solders. Therefore, to enhance the thermal-cycling reliability of low-Ag-content SAC alloys without sacrificing their drop-impact performance, alloying elements such as Mn, Ce, Ti, Bi, In, Sb, Ni, Zn, Al, Fe, and Co were selected as additions to these alloys. However, research reports related to these modified SAC alloys are limited. To address this paucity, the present study reviews the effect of these minor alloying elements on the solder joint reliability of low-Ag-content SAC alloys in terms of thermal cycling and drop impact. Addition of Mn, Ce, Bi, and Ni to low-Ag-content SAC solder effectively improves the thermal-cycling reliability of joints without sacrificing the drop-impact performance. Taking into consideration the improvement in the bulk alloy microstructure and mechanical properties, wetting properties, and growth suppression of the interface intermetallic compound (IMC) layers, addition of Ti, In, Sb, Zn, Al, Fe, and Co to low-Ag-content SAC solder has the potential to improve the thermal-cycling reliability of joints without sacrificing the drop-impact performance. Consequently, further investigations of both thermal-cycling and drop reliability of these modified solder joints must be carried out in future work.

Abstract: Evaluating the capacity value of renewable energy sources can pose significant challenges due to their variable and uncertain nature. In this paper the capacity value of solar power is investigated. Solar capacity value metrics and their associated calculation methodologies are reviewed and several solar capacity studies are summarized. The differences between wind and solar power are examined, the economic importance of solar capacity value is discussed and other assessments and recommendations are presented.

Abstract: In this paper we introduce a new type of Ring Oscillator PUF (RO-PUF) in which the inverters composing the ring oscillators can be supplied by independent voltages. This new RO-PUF can improve the reliability of the PUF in case of temperature variations.

Abstract: Many power switching devices are used in a hybrid vehicle (HV) and an electric vehicle (EV) systems. For future development of the HV/EV, higher performances than Si power device, for example, low on-resistance, high speed, high operation temperature, are strongly required. GaN power devices are promising candidate for the requirements. Present status of the GaN power device development is presented. Reliability of the GaN power device was also discussed.

Abstract: Resistive random access memory (RRAM) is one of the universal memory candidates for computer systems. Although RRAM promises many attractive advantages (e.g., huge data storage, smaller form-factor, lower power consumption, non-volatility, etc.), there are many open issues that still need to be solved, especially those related to its quality and reliability. For instance, open defects may cause RRAM cell to enter an undefined state (i.e., somewhere between logic 0 and 1), making it hard to detect during manufacturing test. As a consequence, this may lead to test escapes (quality issue) and field failures (reliability issue). This paper shows - based on defect and circuit simulation - how testing RRAM is different from testing conventional random access memories and how march test cannot guarantee higher defect coverage. The paper then motivates the need of development of special Design-for-Testability (DfT). A concept of a new DfT is then proposed. The concept is further exploited and mapped into two different DfT circuitries: (i) Short Write Time and (ii) Low Write Voltage. Both DfT schemes are implemented and simulated; the simulation results show that defects causing the RRAM cell to enter an undefined state are easily detected.

Abstract: Significant advancement has been made in the gate oxide reliability of SiC MOS devices to enable the commercial release of Cree’s Z-FET™ product. This paper discusses the key reliability results from Time-Dependent-Dielectric-Breakdown (TDDB) and High Temperature Gate Bias (HTGB) measurements that indicate that the SiC MOSFETs can demonstrate excellent lifetime and stable operation in the field.

Abstract: An advanced high power, high frequency GaN semiconductor process has been used to design high performance E-band power amplifier MMICs demonstrating unprecedented output power, PAE and reliability. To the author's knowledge, these power amplifier designs demonstrate performance beyond previously published results for E-band power amplifier MMICs.

Abstract: Received 28 October 2011 Accepted December, 5 2011 Available online 8 December 2011 Continuous generation of electricity of a power plant depends on the higher availability of its components/equipments. Higher availability of the components/equipments is inherently associated with their higher reliability and maintainability. This paper investigates the reliability, availability and maintainability (RAM) characteristics of a 210 MW coal-fired thermal power plant (Unit-2) from a thermal power station in eastern region of India. Critical mechanical subsystems with respect to failure frequency, reliability and maintainability are identified for taking necessary measures for enhancing availability of the power plant and the results are compared with Unit-1 of the same Power Station. Reliability-based preventive maintenance intervals (PMIs) at various reliability levels of the subsystems are estimated also for performing their preventive maintenance (PM). The present paper highlights that in the Unit-2, Economizer (ECO) & Furnace Wall Tube (FWT) exhibits lower reliability as compared to the other subsystems and Economizer (ECO) & Baffle Wall Tube (BWT) demands more improvement in maintainability. Further, it has been observed that FSH followed Decreasing Failure Rate (DFR) and Economizer (ECO) is the most critical subsystem for both the plants. RAM analysis is very much effective in finding critical subsystems and deciding their preventive maintenance program for improving availability of the power plant as well as the power supply.

Abstract: Spin torque transfer random access memory (STT-RAM) is a promising memory technology because of its fast read access, high storage density, and very low standby power. These memories have reliability issues that need to be better understood before they can be adopted as a mainstream memory technology. In this paper, we first study the causes of errors for a single STT memory cell. We see that process variations and variations in the device geometry affect their failure rate and develop error models to capture these effects. Next we propose a joint technique based on tuning of circuit level parameters and error control coding (ECC) to achieve very high reliability. Such a combination allows the use of weaker ECC with smaller overhead. For instance, we show that by applying voltage boosting and write pulse width adjustment, the error correction capability (t) of ECC can be reduced from t=11 to t=3 to achieve a block failure rate (BFR) of 10^-9.

Abstract: Conventional energy conversion architectures in photovoltaic (PV) systems are often forced to trade off conversion efficiency and power production. This paper introduces a power processing architecture that enables each PV element to operate at its maximum power point (MPP) while only processing a small fraction of the total power produced. This is accomplished by providing only the mismatch in the MPP current of a set of series-connected PV elements. The differential power processing architecture increases overall conversion efficiency and overcomes the challenges of unmatched MPPs (due to partial shading, damage, manufacturing tolerances, etc.). Local control of the differential converters enables distributed protection and monitoring. The reliability analysis included in this paper shows significantly increased overall system reliability. Simulation and experimental results are included to demonstrate the benefits of this approach.

Abstract: Spin-transfer torque random access memory (STT-RAM) has recently gained increased attentions from circuit design and architecture societies. Although STT-RAM offers a good combination of small cell size, nanosecond access time and non-volatility for embedded memory applications, the reliability of STT-RAM is severely impacted by device variations and environmental disturbances. In this paper, we develop a compact switching model for magnetic tunneling junction (MTJ), which is the data storage device in STT-RAM cells. By leveraging the capability to simulate the impacts of thermal and process variations on MTJ switching, our model is able to analyze the diverse mechanisms of STT-RAM write operation failures. Besides the impacts of thermal and process variation, the soft error induced by radiation striking on the access transistor is another important threat to the MTJ reliability. It can also be analyzed by using our model. The incurred computation cost of our model is much less than the conventional macro-magnetic model, and hence, enabling its applications in comprehensive STT-RAM reliability analysis and design optimizations.

Abstract: This paper considers monitoring of semiconductor thermal cycling in high-power resonant converters. For the experiments, a dedicated single-phase resonant converter rated at 1 kV, 250 A (250-kW peak power, duty ratio 10%, 25-kW average power, AND pulse length 1 ms) was been developed. This converter represents one phase of a multiphase resonant power supply designed for long-pulse modulation (typically 1-2 ms) when equipped with a suitable output transformer. Pulsed operation is obtained by direct modulation of the high-frequency power supply. The main aim of the study reported here is to develop a methodology to assess performance and reliability issues related to the use of standard commercially available power switch technology, relying on a physics-based multichip insulated gate bipolar transistor (IGBT) structure model, and to experimentally monitor the chip temperature using high-speed thermal imaging, during the pulse, to identify any limitations of the proposed modulator technology. First, an overview of the converter, including its nominal electrical design, is provided. Optimization of the turn-OFF snubber capacitance is performed through a series of experiments, employing calorimetrically measured losses, to determine a value, which minimizes the overall power losses. Accurate calorimetric measurements of the switching losses and infrared measurements of the IGBT surface temperatures during transient operation are presented. Simulations including multichip structures, experimental results, and high-quality chip thermal images are provided to validate the effectiveness of the proposed approaches.