Abstract: Developing and maintaining industrywide standards for lifetime reliability is a critical task for all microprocessor manufacturers. Although technology scaling continues to provide significant performance benefits, increasingly smaller feature sizes and increasing power densities are accelerating the onset of wearout-based failures, thus shortening processor life. Microarchitects have traditionally treated processor lifetime reliability as a manufacturing problem, best left to device and process engineers. In current processors, manufacturers enforce lifetime reliability, or qualify it, during device design, circuit layout, manufacture, and chip test. This reliability qualification, which is application-oblivious, is based on estimates of worst case temperature and processor utilization. However, most applications will run at lower temperature and utilization, resulting in higher reliability and longer processor lifetimes than required. As a result, current reliability qualification methodologies are overly conservative, unnecessarily increasing cost or decreasing performance. Sustaining this approach will likely be infeasible in future scaled systems.

Abstract: This research has developed a lead-free semiconductor device interconnect technology by studying the processing-microstructure-property relationships of lowtemperature sintering of nanoscale silver pastes. The nanoscale silver pastes have been formulated by adding organic components (dispersant, binder and thinner) into nano-silver particles. The selected organic components have the nano-particle polymeric stabilization, paste processing quality adjustment, and non-densifying diffusion retarding functions and thus help the pastes sinter to ~80% bulk density at temperatures no more than 300°C. It has been found that the low-temperature sintered silver has better electrical, thermal and overall thermomechanical properties compared with the existing semiconductor device interconnecting materials such as solder alloys and conductive epoxies. After solving the organic burnout problems associated with the covered sintering, a lead-free semiconductor device interconnect technology has been designed to be compatible with the existing surface-mounting techniques with potentially low-cost. It has been found that the low-temperature sintered silver joints have high electrical, thermal, and mechanical performance. The reliability of the silver joints has also been studied by the 50-250°C thermal cycling experiment. Finally, the bonging strength drop of the silver joints has been suggested to be ductile fracture in the silver joints as micro-voids nucleated at microscale grain boundaries during the temperature cycling. The low-temperature silver sintering technology has enabled some benchmark packaging concepts and substantial advantages in future applications.

Abstract: The power grid is aging, under-utilized and increasingly congested. Conventional solutions, such as flexible AC transmission systems (FACTS) can be used to control power flow on the grid. However, widespread adoption of this technology has been hampered by high cost and reliability concerns. The concept of distributed FACTS (D-FACTS) devices, as an alternative approach to realizing cost-effective power flow control, has been recently proposed. This paper discusses the design considerations for implementing distributed power control solutions on the power grid, with specific examples for series VAR compensation, and the significant impact it can have on grid utilization and system reliability. The ability to use mature power conversion techniques demonstrates the potential for low-cost implementation.

Abstract: Abstract An understanding of the reliability and validity of health-related quality of life (HRQoL) measurement is needed to develop or select the best HRQoL measures for any given application. This chapter summarizes reliability and validity, and how these properties are used to evaluate HRQoL survey instruments. Reliability refers to the extent to which a measure yields the same number or score each time it is administered, all other things being equal (i.e., true change has not occurred in the attribute being measured). Classical test theory regards observed responses as consisting of the sum of true score and error. True score for an individual is assumed to be invariant on repeated measurements. However, two parallel measurements will.

Abstract: An economic comparison of several HVAC-HVDC transmission systems from large offshore windfarms is presented. The power output from the offshore windfarm is modeled by an aggregated power curve. The ...

Abstract: This work presents the behavior of single-chip insulated gate bipolar transistors (IGBT) devices under repetitive short-circuit operations. The 600 and 1200 V nonpunch through IGBTs as well as 600 V COOLMOS (trademark of Infineon Technologies) have been tested. The repetition of these severe working conditions is responsible for devices ageing, and results unavoidably in the components failure. A series of experimental tests were made in order to determine the number of short-circuit operations the devices can support before failure for different dissipated energies. The temperature influence has been also investigated. Results show two distinct failure modes depending on the dissipated energy during the tests. A critical value of short-circuit energy has been pointed out which separates these failure modes. Experimental and numerical investigations have been carried out in order to analyze these failure modes. A detailed analysis of the physical mechanisms occurring during the short-circuit failures for dissipated energies equal or lightly higher than the critical value is presented.

Abstract: Demands for increasing power density and levels of functional integration in switch-mode power converters require power electronics manufacturers to develop innovative packaging solutions for power semiconductor devices and modules. Three-dimensional (3-D) packaging techniques offer the potential of lower resistance, higher current handling capability, smaller volume, better thermal management capability, and high reliability. In this paper, we present the constructions and some electrical and thermomechanical analyses of four 3-D packaging approaches that have been developed within the Center for Power Electronics Systems-an NSF Engineering Research Center.

Abstract: Power electronics can provide utilities the ability to more effectively deliver power to their customers while providing increased reliability to the bulk power system. In general, power electronics is the process of using semiconductor switching devices to control and convert electrical power flow from one form to another to meet a specific need. These conversion techniques have revolutionized modern life by streamlining manufacturing processes, increasing product efficiencies, and increasing the quality of life by enhancing many modern conveniences such as computers, and they can help to improve the delivery of reliable power from utilities. This report summarizes the technical challenges associated with utilizing power electronics devices across the entire spectrum from applications to manufacturing and materials development, and it provides recommendations for research and development (R&D) needs for power electronics systems in which the U.S. Department of Energy (DOE) could make a substantial impact toward improving the reliability of the bulk power system.

Abstract: We explain how the manufacturing technology and reliability for advanced interconnects is impacted by the choice of metallization and interlayer dielectric (ILD) materials. The replacement of aluminum alloys by copper, as the metal of choice at the 130-nm technology node, mandated notable changes in integration, metallization, and patterning technologies. Those changes directly impacted the reliability performance of the interconnect system. Although further improvement in interconnect performance is being pursued through utilizing progressively lower dielectric constant (low-k) ILD materials from one technology node to another, the inherent weak mechanical strength of low-k ILDs and the potential for degradation in the dielectric constant during processing pose serious challenges to the implementation of such materials in high-volume manufacturing. We consider the cases of two ILD materials, carbon-doped silicon dioxide and low-k spin-on-polymer, to illustrate the impact of the ILD choice on the process technology and reliability of copper interconnects.

Abstract: Over the years the reliability and durability of c-Si and thin-film photovoltaic (PV) modules and balance-of-system (BOS) components have improved consistently. This paper reviews performance of PV modules and BOS components and discusses the role of encapsulants, adhesional strength, impurities, metallization, solder bond integrity and breakage, corrosion, backing layers, junction boxes and high-voltage bias testing in relation to their effect on module and inverter reliability. It is suggested that the concepts of physics of reliability of electronic packages will be useful to understand, address and resolve new problems in PV module and inverter reliability.

Abstract: Using a fixed temperature for thermal throttling is pessimistic. Reduced aging during periods of low temperature can compensate for accelerated aging during periods of high temperature. Runtime tracking of the temperature-dependent aging rate means that throttling is engaged only when necessary to maintain reliability. In this article, we show that the effect of cool (low-temperature) phases can compensate for that of hot (high-temperature) phases on reliability. Existing dynamic thermal management (DTM) techniques ignore the effects of temperature fluctuations on chip lifetime and can unnecessarily impose performance penalties for hot phases. Using electromigration as the targeted failure mechanism, we apply a dynamic reliability model and propose a dynamic reliability management (DRM) technique to dynamically track the consumption of chip lifetime during operation.

Abstract: We present a study on the layout dependence of a SiGe S/D PMOSFET technology. While 65% increase in drive current is obtained for 45nm gate length transistors with large active areas, measurements and simulations show that this improvement may be seriously degraded when transistor dimensions, such as the source-drain length (L/sub s/d/) and the device width are further scaled. TDDB and NBTI measurements show that the oxide reliability is not degraded for this technology.

Abstract: Charge trapping in high-/spl kappa/ gate dielectrics affects the result of electrical characterization significantly. DC mobility degradation and device threshold voltage instability and C-V and I-V hysteresis are a few examples. The charging effects in high-/spl kappa/ gate dielectric also affect the validity of conventional reliability test methodologies developed for SiO/sub 2/ devices. In this paper, we review high-/spl kappa/ materials specific phenomena that can affect the validity of constant-voltage-stress-based reliability test methods to address the direction of future reliability study on high-/spl kappa/ devices.

Abstract: As technology scales, power consumption and thermal effects have become challenges for system-on-chip designers. The rising on-chip temperatures can have negative impacts on SoC performance, power, and reliability. In view of this, we present a hybrid optimization approach which aims at temperature reduction and hot spot elimination. We demonstrate that considerable improvement in the thermal distribution of a design can be achieved through careful voltage island partitioning, voltage level assignment, and voltage island floorplanning. The experimental results on MCNC benchmarks show significant improvement on the thermal profiles. To the best of our knowledge, this is the first work to explore the thermal impacts of voltage islands.

Abstract: In large epidemiologic studies, information on breastfeeding practice is often collected from maternal recall through interviews, but there is concern about the accuracy of the data, especially when mothers are asked to recall their practices from many years earlier. This review examines the validity and reliability of maternal recall of breastfeeding history using 11 studies published between 1966 and 2003 in English with a sample of 10 or more. Validity is the degree to which recall compares with a validation standard or reference, and reliability refers to the degree to which the breastfeeding practices obtained by recall are repeatable over time. The existing studies suggest that maternal recall is a valid and reliable estimate of breastfeeding initiation and duration, especially when the duration of breastfeeding is recalled after a short period ( 3 years). Validity and reliability of maternal recall for the age at introduction of food and fluids other than breast milk are less satisfactory. Further and more extensive studies on maternal recall of breastfeeding history and ways to improve such recall are warranted.

Abstract: To be reliable, a system must be robust—it must avoid failure modes even in the presence of a broad range of conditions including harsh environments, changing operational demands, and internal deterioration. This paper discusses and codifies techniques for robust system design that operate by expanding the range of conditions under which the system functions. A distinction is introduced between one-sided and two-sided failure modes, and four strategies are presented for creating larger windows between sets of one-sided failure modes. Each strategy is illustrated through two examples from industrial practice. For each strategy, one example is from paper handling and another is from jet engines. By showing that every strategy has been successfully applied to each system, we seek to illustrate that the strategies are widely applicable and highly effective. © 2005 Wiley Periodicals, Inc. Syst Eng 8: 245–261, 2005

Abstract: This paper presents a 65nm low power technology offering a dual gate oxide process, multiple Vt devices at a nominal operating voltage of 12V, a nine level hierarchical Cu interconnect back-end of line process with low k dielectrics and 0676mum2 and 054mum 2 SRAM cells, optimized for performance and density, respectively The key focus of this technology has been low cost, process simplicity and power reduction A gate dielectric with an nfet leakage current as low as 15pA/mum and with exceptional reliability characteristics has been demonstrated Moreover, competitive drive current has been achieved, 725/343muA/mum at an off current of 7nA/mum for n/pfets at nominal voltage A pfet performance enhancement of an additional 13% at 7nA/mum off current was achieved by using mobility enhancement techniques without adding process complexity An optimized NiSi process and high angle, low dose halo implants contribute to the reduced junction leakage and GIDL current

Abstract: This paper highlights the case studies of steel plant and municipal corporation taking into consideration the power quality improvements. The main reason we are interested in power quality is economic value. The increasing application of electronic equipment and distributed generation has heightened the interest in power quality in recent years and this has been accompanied by special development of special terminology to describe the phenomena. Meeting customer's expectations and maintaining customer confidence are the strong motivators behind maintaining the power quality. Distributed generation has started gaining importance in our country and can become the answer for increasing the power failure. Power failure leads power interruption leading to insecure and unreliable power system

Abstract: Abstract Preference-based measures are playing an increasingly important role in the assessment of health-related quality of life (HRQoL) as an outcome measure in clinical trials and other studies, in supporting decision analyses, and in supporting economic evaluations and health technology assessments of screening, prevention, and treatment interventions. The chapter will discuss the conceptual foundations of preference-based measures, describe the two basic approaches to preference-based measurement, summarize evidence on reliability, construct validity, responsiveness (longitudinal construct validity), and predictive validity, and briefly describe selected applications.

Abstract: In this paper we shall review the basis for the design of integrated circuits with amorphous silicon TFTs on glass, first by the analysis of the TFT reliability then by the use of the reliability data to optimise the circuits design.

Abstract: System integration and high power density of monolithic and multichip designs are the driving force for the progress in power electronic systems. The whole system has to be considered and optimized to meet this target and to keep the overall ruggedness, sensitivity toward electromagnetic interference and long term reliability, Silicon utilization system reliability and power units miniaturization are the key factors. In this paper new technologies, advanced devices concepts and future system aspect for system-integration in the automotive and industrial segments are discussed. In both fields of applications these are huge requirements toward system dynamic characteristic, overload capability, ruggedness behavior and reliability. In the automotive segment technologies working at high operating temperatures are required and in the industrial are high blocking voltage capabilities are needed.

Abstract: The reliability of portable electronic devices was studied by applying standardized test procedures for test vehicles that represent the technologies and lead-free materials typically used in novel portable products. Thermal cycling and drop testing are commonly used because they reveal the failure modes and mechanisms that portable devices experience in operational environments. A large number of component boards were assembled in a full-scale production line to enable proper statistical and fractographic analyses. The test boards were assembled with different printed wiring board protective coatings, component under bump metallizations, and solder pad structures. The component boards were tested and the times-to-failure of the various combinations were statistically analyzed. The reliability data were also analyzed by the Weibull method, and the characteristic lifetimes and shape parameters were calculated. The failure modes under the thermal cycling, where solder interconnections fail by cracking through the bulk solder, were different from those observed in the drop tests, where cracks propagate along the intermetallic layers on either side of the interconnections. Under the thermomechanical loading the as-soldered microstructure, which is composed of only a few large eutectic colonies, undergoes local recrystallization that produces networks of grain boundaries along which the intergranular cracks damage solder interconnections. Under the mechanical shock loading, in turn, the strain–rate hardening of the solder material forces cracks to propagate in the intermetallic layers instead of the bulk solder. It was found that the reliability of solder interconnections can improve when the component boards have undergone thermal cycles before drop testing. The high-angle boundaries between the recrystallized grains generated during thermal cycling provide paths along which cracks can propagate but the propagation through the bulk solder consumes more energy than the propagation through brittle intermetallic layers. On the other hand, prolonged lifetime at elevated temperatures can reduce the drop test reliability considerably due to the formation of Kirkendall voids in the Cu3Sn intermetallic layers.

Abstract: Aggressive transistor scaling, decreased voltage margins and increased processor power and temperature, have made reliability assessment a much more significant issue in design. Although reliability of devices and interconnect has been broadly studied, here we characterize reliability at the system level. Thus we consider component-based System on Chip designs. Reliability is strongly affected by system temperature, which is in turn driven by power consumption. Thus, component reliability and their power management should be addressed jointly. We present here a joint reliability and power management optimization problem whose solution is an optimal management policy. When careful joint policy optimization is performed, we obtain a significant improvement in energy consumption (40%) in tandem with meeting reliability constraint for all operating temperatures.

Abstract: This paper presents methods for calculating the reliability of distribution systems with distributed energy resources (DER). The impact of intentional islanding of the DER units on the reliability is studied in detail. Different levels of automation are considered, starting from the existing network and continuing with increasing levels of intelligence in the network. The role of the switching devices and of the restoration process is discussed in detail