TL;DR: A high slew-rate amplifier with push-pull output driving capability is proposed to enable an ultra-low quiescent current (Iq ~ 1muA) low-dropout (LDO) regulator with improved transient responses to improve stability of LDO regulators without using any on-chip and off-chip compensation capacitors.
Abstract: A high slew-rate amplifier with push-pull output driving capability is proposed to enable an ultra-low quiescent current (Iq ~ 1muA) low-dropout (LDO) regulator with improved transient responses. The proposed amplifier eliminates the tradeoff between small Iq and large slew-rate that is imposed by the tail-current in conventional amplifier design. Push-pull output stage is introduced to enhance the output driving ability. Small dropout voltage (Vbo) with large-size pass transistor and ultra-low Iq can thus be used to minimize power loss of LDO regulator without transient-response degradation. The proposed amplifier helps to improve stability of LDO regulators without using any on-chip and off-chip compensation capacitors. This is beneficial to chip-level power management requiring high-area efficiency. An LDO regulator with the proposed amplifier has been implemented in a 0.18- mum standard CMOS process and occupies 0.09 mm2. The LDO regulator can deliver 50-mA load current at 1-V input and ~ 100-mV VDO . It only consumes 1.2 muA Iq and is able to recover within ~ 4 mus even under the worst case scenario.
TL;DR: In this article, a Wilkinson power divider with a differential output implemented in parallelstrip-line (PSL) is proposed, taking full advantage of the PSL technology and a three-stage cascaded design, more than 170% impedance and isolation bandwidths are obtained.
Abstract: A Wilkinson power divider with a differential output implemented in parallel-strip-line (PSL) is proposed. Taking full advantages of the PSL technology and a three-stage cascaded design, more than 170% impedance and isolation bandwidths are obtained. Inherent to the PSL structure, the 180deg differential output is frequency-independent. A class-B push-pull power amplifier employing the devised concept is designed, showing a peak efficiency of 44% over a 4-GHz bandwidth. Without exploiting any extra and external low-pass filters, the proposed design can produce startling second-harmonic suppressions (more than 50dB) over the whole working dynamics and operated bandwidth
TL;DR: An output capacitor-free low-dropout regulator (LDO) using a class-AB operational amplifier and an assistant push–pull output stage (APPOS) circuit to enable fast-transient response with ultralow-power dissipation is presented in this brief.
Abstract: An output capacitor-free low-dropout regulator (LDO) using a class-AB operational amplifier and an assistant push–pull output stage (APPOS) circuit to enable fast-transient response with ultralow-power dissipation is presented in this brief. The APPOS circuit is proposed to deliver an extra current that is directly proportional to the output current of the class-AB operational amplifier during transient state with an automatic on/off feature. Moreover, the small-signal and large-signal responses of LDO can be separately optimized. As a result, transient performances of LDO are improved significantly without requiring an area-consuming on-chip capacitor anymore. The proposed LDO has been implemented in a standard 0.35- $\mu\hbox{m}$ CMOS process. Experimental results show that the LDO can regulate the output voltage at 1.0 V from a 1.2-V supply voltage for the maximum load current of 100 mA. The output voltage fully recovers within 2.7 $\mu\hbox{s}$ with the load current switching from 100 $\mu\hbox{A}$ to 100 mA at a 1.2- $\mu\hbox{A}$ quiescent current.
TL;DR: The symmetrical Class E circuit, under nominal operating conditions, has extremely low harmonic distortions, and the design of the impedance matching network for harmonic filtering becomes less critical.
Abstract: Class E power amplifier circuits are very suitable for high efficiency power amplification applications in the radio-frequency and microwave ranges. However, due to the inherent asymmetrical driving arrangement, they suffer significant harmonic contents in the output voltage and current, and usually require substantial design efforts in achieving the desired load matching networks for applications requiring very low harmonic contents. In this paper, the design of a Class E power amplifier with resonant tank being symmetrically driven by two Class E circuits is studied. The symmetrical Class E circuit, under nominal operating conditions, has extremely low harmonic distortions, and the design of the impedance matching network for harmonic filtering becomes less critical. Practical steady-state design equations for Class E operation are derived and graphically presented. Experimental circuits are constructed for distortion evaluation. It has been found that this circuit offers total harmonic distortions which are about an order of magnitude lower than those of the conventional Class E power amplifier.
TL;DR: In this article, a dual voltage power supply for vehicles equipped with a DC generator, a single storage battery, a low voltage load circuit including the storage battery and a high voltage load device designed to be powered by voltages higher than the battery voltage.
Abstract: A dual voltage power supply is disclosed for vehicles equipped with a DC generator, a single storage battery, a low voltage load circuit including the storage battery, and a high voltage load circuit including load devices designed to be powered by voltages higher than the battery voltage. At times when higher voltage power is required a low voltage regulator that includes a high current semiconductor switch converts power at the generator output voltage to power at a lower voltage for charging the battery and supplying the low voltage load circuit. There is a single voltage mode of operation when higher voltage power is not required in which the alternator is regulated to supply power at the voltage required by the low voltage load circuit and the high current semiconductor switch is held in its closed state to directly connect the generator output with the low voltage load circuit. The low voltage regulator is a switching DC to DC voltage converter with an N channel mosfet power transistor switch controlled by an improved driver circuit. The driver circuit has a floating totem pole output and a capacitively coupled input and is assisted by a pull down circuit and current from a low current supply. An input accepts a signal controlling whether the system operates in dual or single voltage mode. One or more transient absorbing semiconductors and a circuit for rapidly decreasing rotor current limit the duration of alternator overvoltage.