Abstract: This paper presents a new E-type module for asymmetrical multilevel inverters (MLIs) with reduced components. Each module produces 13 levels with four unequal dc sources and 10 switches. The design of the proposed module makes some preferable features with a better quality than similar modules such as the low number of semiconductors and dc sources and low switching frequency. Also, this module is able to create a negative level without any additional circuit such as an H-bridge, which causes reduction of voltage stress on switches. Cascade connection of the proposed structure leads to a modular topology with more levels and higher voltages. Selective harmonics elimination pulse width modulation (SHE-PWM) scheme is used to achieve high-quality output voltage with lower harmonics. MATLAB simulations and practical results are presented to validate the proposed module good performance. Module output voltage satisfies harmonics standard (IEEE519) without any filter in output.

Abstract: An improved model-free predictive current control (IMFPCC) method for synchronous reluctance motor (SynRM) drives is presented in this paper. The main advantages of previous MFPCC are that it does not require specific SynRM models and it requires neither motor parameters nor back-EMF estimations. However, this approach has two disadvantages: 1) two current measurements are required in each sampling period, which may lead to the detection of undesirable current spikes caused by instantaneous switching inside the inverter, and 2) an unresolved problem of stagnant current-variation updates, which undermines the prediction performance. This paper intends to eliminate these two drawbacks while retaining all the merits of MFPCC. The proposed IMFPCC is simple and easy to realize. Furthermore, no pulsewidth modulation (PWM) technique is required. A 32-bit microprocessor, TMS320F2809, is utilized to implement both the proposed IMFPCC and the model-based predictive current control (MBPCC) for a performance comparison. Experiment results are provided to validate the proposed method and verify its feasibility.

Abstract: This paper proposed a modulation scheme for the dual-active-bridge (DAB) converter to reduce rms current in wide-range operating conditions. The operating principle of the proposed fundamental duty modulation (FDM) is formulated based on the fundamental component analysis of the DAB converter. By modulating the PWM signals in the fundamental component domain, the optimal operation is implemented with a simple controller structure not requiring an operating mode classification, offline calculation, or current information. Operating characteristics including rms current level and ZVS characteristics are analyzed to compare loss breakdowns of the proposed scheme to those of recent related works. The proposed FDM achieves high efficiency under wide operation conditions due to reduced conduction level and wide ZVS range. Experimental results are obtained under various voltage gain and load conditions to confirm the operation of the proposed modulation scheme. A thorough experimental comparison with other sophisticated modulation schemes has verified the efficiency improvement of FDM.

Abstract: This paper proposes a dual-space vector control scheme for the open-end winding permanent magnet synchronous motor (OEW-PMSM) drive fed by the dual inverter with a single dc supply. Potential zero-sequence current in the open-end winding drive system has to be considered since it causes circulating current in the winding and leads to high current stress of power semiconductor devices and high losses. Zero-sequence current in open-end winding ac motor drives is usually caused by the zero-sequence voltage, and therefore switching combinations which do not produce zero-sequence voltage are used to synthesize the reference voltage in existing methods. But even so, the zero-sequence voltage can also be produced by the dead time of the inverter. In order to suppress zero-sequence current in the OEW-PMSM drive, a dual-space vector control scheme is proposed and a novel dual-inverter space vector pulse width modulation (PWM) with the zero-sequence voltage reference is employed to regulate system zero-sequence voltage in this paper. Compared with existing dual inverter PWM strategies, the novel algorithm build a regulation mechanism for the zero-sequence voltage. The proposed method is compared with the conventional vector control by simulations and experiments, and the results shown that the proposed scheme can suppress zero-sequence current effectively.

Abstract: In this paper, three control schemes with variable switching frequencies are proposed and analyzed for the paralleled voltage source inverters (VSIs) fed permanent magnet synchronous motor (PMSM) drive. The proposed schemes could be applied in the low-speed operation region of high-power drive system, where the frequency modulation index is high. First, the field-oriented control (FOC) with phase-shifted chaotic space vector modulation (SVM) under synchronous frame and the FOC with phase-shifted chaotic sinusoidal pulse width modulation under stationary frame is proposed for the paralleled VSIs fed PMSM drive. The proposed phase-shifted chaotic PWM schemes not only eliminate specific switching harmonics completely but also suppress all remaining switching harmonic peaks in the spectrum. The avoidance of inherent circulating current is also considered in designing these two schemes. Second, the direct torque control (DTC) for the paralleled VSIs fed PMSM drive is proposed with circulating current suppression. Besides inheriting the advantages of DTC, the output currents of paralleled VSIs are kept balanced. The working principles of these three methods are presented in detail. Experimental results on a laboratory prototype are given to verify the validity of the three proposed control schemes for the paralleled VSIs fed PMSM with variable switching frequencies.

Abstract: In this paper, a novel cascaded seven-level inverter topology with a single input source integrating switched-capacitor techniques is presented. Compared with the traditional cascade multilevel inverter, the proposed topology replaces all the separate dc sources with capacitors, leaving only one H-bridge cell with a real dc voltage source and only adds two charging switches. The capacitor charging circuit contains only power switches, so that the capacitor charging time is independent of the load. The capacitor voltage can be controlled at a desired level without complex voltage control algorithm and only use the most common carrier phase-shifted sinusoidal pulse width modulation strategy. The operation principle and the charging–discharging characteristic analysis are discussed in detail. A 1-kW experimental prototype is built and tested to verify the feasibility and effectiveness of the proposed topology.

Abstract: The converter with a single-phase rectifier, a dc-link circuit and a three-phase inverter is widely applied in high-speed railway electrical traction drive system. The fault frequency of single-phase rectifier is higher than that of three-phase inverter. Thus, this paper presents a new and fast model-based approach for open-switch fault diagnosis of the single-phase pulse width modulation rectifier, based on the mixed logical dynamic model and residual generation. It requires no additional hardware but only some measurements and command signals which are available in control system. This diagnosis method is quite suitable for electrical traction application due to the fast diagnosis time, simple structure and high reliability. Experimental results confirm the effectiveness and accuracy of the proposed algorithm. It is shown that such diagnosis method can locate the faulty switch in a few milliseconds which is important to avoid catastrophic consequences.

Abstract: Finite-control-set model predictive control (FCSMPC) has been proposed as a powerful control strategy for the power control of the pulse-width modulation rectifier. However, conventional FCSMPC applies only one voltage vector during one control period, which still presents relatively high power ripples. Introducing a zero vector in combination with a nonzero vector during one control period can improve the steady-state performance of the conventional FCSMPC, but the fixed vector combination is not an optimal solution in minimizing power errors. This paper proposes an improved two-vectors-based MPC, which relaxes the vector combination to two arbitrary voltage vectors. Compared to prior improved MPC with fixed vector combinations, the proposed method achieves better steady-state performance without affecting the dynamic response. Furthermore, the average switching frequency is reduced by up to 29.5% in average. The principles of vector selection and optimal vector duration are introduced in detail. The results obtained from two kinds of three-vectors-based predictive control methods are also presented for the aim of comparison. Both simulation and experimental results confirm the theoretical study and the effectiveness of the proposed method.

Abstract: The requirement for high-voltage gain step-up dc–dc converters is increasingly becoming important in many modern power supply applications They are an essential power conversion stage in systems, such as grid-connected renewables and electric vehicles Unfortunately, achieving a low cost, high efficiency, power dense, step-up converter with high-voltage gain is not a trivial task; yet they are highly desirable when aiming for a green power supply solution For this reason, this paper presents a new nonisolated interleaved dc–dc boost converter with zero voltage switching The proposed converter is designed around a coupled inductor with an active-clamping circuit arrangement to recycle the coupled inductor leakage energy and reduce the voltage stress on the semiconductor devices The lack of isolation transformer improves the power density of the system Likewise, the interleaved circuit allows for high efficiency over a broad range of operating conditions The theoretical behavior of the power converter is fully described, and the performance of the circuit is validated through experimental results Importantly, the circuit is capable of achieving $> 10\times $ voltage gains without the need to apply extreme modulation signals to the pulse width modulation circuit

Abstract: Eliminating the leakage current is one of the most important issues for transformerless three-phase photovoltaic (PV) systems In this paper, the leakage current elimination of a three-phase four-leg PV inverter is investigated With the common-mode loop model established, the generation mechanism of the leakage current is clearly identified Different typical carrier-based modulation methods and their corresponding common-mode voltages are discussed A new modulation strategy with Boolean logic function is proposed to achieve the constant common-mode voltage for the leakage current reduction Finally, the different modulation methods are implemented and tested on the TMS320F28335 DSP +XC3S400 FPGA digital control platform The experimental results verify the effectiveness of the proposed solution

Abstract: Synchronous optimal modulation and predictive current control and their preferred applications in drive control systems are described. Operation at low switching frequency is required to minimize harmonic distortion and switching losses, thus increasing the utilization of medium-voltage inverters and drive motors. Maximum fundamental output voltage is achieved by predictive overmodulation. Predictive torque control offers less attractions.

Abstract: With wide application of inverters in modern industry, common-mode voltage (CMV) problems invoked severe negative effects. Hardware and software solutions have been proposed to reduce the CMV. Compared with hardware CMV mitigation solutions, software strategies based on pulse-width modulation (PWM) modifications have aroused widespread attention for their cost-effective and control flexible advantages. Up to date, various reduced CMV PWM (RCMV-PWM) strategies have been reported, such as active zero state PWM, remote state PWM, near state PWM, phase-shifted carrier PWM, carrier peak position modulation and so on. For convenience of understanding and utilising the existed RCMV-PWM strategies, this study conducts a review on this topic. According to the principle of CMV reduction algorithms, the study divides the reported RCMV-PWM strategies into three different categories. It also presents comparisons of CMV reduction techniques and output performances (like CMV value, output ripple and linearity range) between different strategies. Meanwhile, CMV suppression principles, problems in implementation and improvements of each technique are described in detail. Moreover, the inherent characteristics and development tendencies of the RCMV-PWM techniques are discussed so as to offer reference for further research.

Abstract: This paper presents an alternative approach to address the control and modulation problem of single-phase three-level converters applied in the high-speed railway electrical traction drive system. Following the principle of deadbeat predictive direct torque control of ac motors, this paper discusses an improved direct power control (DPC) method based on a deadbeat active and reactive power prediction technique. Comparing with the conventional PI-based DPC scheme, the proposed deadbeat predictive DPC scheme can provide these advantageous features: lower current harmonics and THD index, lower active and reactive power ripples, and fewer adjusted parameters. Moreover, compared with PI-based DPC with the PI parameters optimization, this approach can also easily obtain fast dynamic response but without the main voltage orientation. A single-phase three-level space vector pulse width modulation (SVPWM) with inherent neutral-point voltage balancing capability is adopted, which can be combined with DPC scheme as an overall control and modulation system. A series of simulation and experimental tests have been conducted to demonstrate an excellent performance of the deadbeat predictive DPC. In addition, the neutral-point-voltage balancing ability of the adopted SVPWM method has been verified.

Abstract: To increase the fault tolerance for cascaded H-bridge multilevel inverters (CHMIs) based on level-shifted pulse width modulation (LS-PWM), a modified LS-PWM method is proposed for the inverters operating under faulty conditions. To cover both open- and short-device fault cases, two types of switching scheme are included in this PWM method. With this PWM method, the neutral shift can be applied as fault-tolerant control for CHMIs based on LS-PWM. Finally, three-phase-balanced line-to-line voltages and currents with minimum harmonic distortion are produced for the inverter with disabled power cells. In addition, this LS-PWM method has the capability to improve power distribution among the H-bridge power cells under the faulty conditions. Simulation and experimental results show that the proposed PWM method performs satisfactorily to achieve fault tolerance.

Abstract: This paper proposes a simplified space vector modulation (SVM) scheme for multilevel converters. Compared with earlier SVM methods, the proposed scheme simplifies the detection of the nearest three vectors and the generation of switching sequences, and therefore is computationally more efficient. Particularly, for the first time, the proposed scheme achieves the same easy implementation as phase-voltage modulation techniques. Another superior characteristic of the proposed scheme over earlier methods is its potential for multiphase multilevel applications. The proposed scheme also offers the following significant advantages: 1) independence of the level number of the converter; 2) more degrees of freedom, i.e., redundant switching sequences and adjustable duty cycles, to optimize the switching patterns; and 3) no need for lookup tables or coordinate transformations. These advantages make the proposed scheme well suited to large level-number applications, such as modular multilevel converters and high voltage direct current systems. Simulation and experimental results verify this new concept.

Abstract: This paper proposes a new five-level voltage source inverter for medium-voltage high-power applications. The proposed inverter is based on the upgrade of a four-level nested neutral-point clamped converter. This inverter can operate over a wide range of voltages without the need for connecting power semiconductor in series, has high-quality output voltage and fewer components compared to other classic five-level topologies. The features and operation of the proposed converter are studied and a simple sinusoidal PWM scheme is developed to control and balance the flying capacitors to their desired values. The performance of the proposed converter is evaluated by simulation and experimental results.

Abstract: In this paper, an advanced control strategy for grid­tied photovoltaic (PV) cascaded H­bridge (CHB) inverter is proposed. The circuit topology consists of a proper number of power cells (H­bridge configuration) connected in series and supplied by individual PV modules. The adopted control method is a mixed staircase­PWM technique performed by means of a sorting algorithm to determine cells' switching state. The cells' state is related to the need of charging or discharging a particular cell much more than the others by calculating the voltage error at each dc­link (e.g., by considering the difference between the maximum power point tracking (MPPT) reference and the measured quantity). A dedicated PO thus, increasing the power extraction even in mismatched conditions. In order to prove the effectiveness and feasibility of the proposed approach, a set of experiments are performed on a laboratory prototype of a single­phase five­level PV CHB. The control section is implemented on FPGA by using a dSPACE real­time hardware platform; thus, obtaining fully dedicated digital circuits. Experimental results show good performance in terms of MPPT efficiency, total harmonic distortion, and power factor in both normal operation and mismatch conditions.

Abstract: This paper proposes a novel robust and adaptive sliding-mode (SM) control for a cascaded two-level inverter (CTLI)-based grid-connected photovoltaic (PV) system. The modeling and design of the control scheme for the CTLI-based grid-connected PV system is developed to supply active power and reactive power with variable solar irradiance. A vector controller is developed, keeping the maximum power delivery of the PV in consideration. Two different switching schemes have been considered to design SM controllers and studied under similar operating situations. Instead of the referred space vector pulsewidth modulation (PWM) technique, a simple PWM modulation technique is used for the operation of the proposed SM controller. The performance of the SM controller is improved by using an adaptive hysteresis band calculation. The controller performance is found to be satisfactory for both the schemes at considered load and solar irradiance level variations in simulation environment. The laboratory prototype, operated with the proposed controller, is found to be capable of implementing the control algorithm successfully in the considered situation.

Abstract: A systematic method for deriving soft-switching three-port converters (TPCs), which can interface multiple energy, is proposed in this paper. Novel full-bridge (FB) TPCs featuring single-stage power conversion, reduced conduction loss, and low-voltage stress are derived. Two nonisolated bidirectional power ports and one isolated unidirectional load port are provided by integrating an interleaved bidirectional Buck/Boost converter and a bridgeless Boost rectifier via a high-frequency transformer. The switching bridges on the primary side are shared; hence, the number of active switches is reduced. Primary-side pulse width modulation and secondary-side phase shift control strategy are employed to provide two control freedoms. Voltage and power regulations over two of the three power ports are achieved. Furthermore, the current/voltage ripples on the primary-side power ports are reduced due to the interleaving operation. Zero-voltage switching and zero-current switching are realized for the active switches and diodes, respectively. A typical FB-TPC with voltage-doubler rectifier developed by the proposed method is analyzed in detail. Operation principles, control strategy, and characteristics of the FB-TPC are presented. Experiments have been carried out to demonstrate the feasibility and effectiveness of the proposed topology derivation method.

Abstract: This letter proposes an improved nearest-level modulation (NLM) method to enhance the quality of output voltage of a modular multilevel converter (MMC) with the low amount of submodules, as well as restrain the voltage fluctuation of the submodules. By adding a small offset, which is alternating at the double fundamental frequency to the reference signals, a small phase shift of the step-changing moment between upper and lower arms’ voltage emerges. As a result, an odd-level difference between the output voltage of lower arm and that of upper arm occurs, which can increase the level number of output voltage from $N + 1$ to $2N + 1$ , where N is the number of submodules per arm. With the proposed method, the total harmonic distortion (THD) of the output voltage is mitigated without increasing the switching frequency of IGBTs or changing the average voltage of submodules’ capacitor. In addition, within a special range of power factor angle, the circulating current can be reduced by choosing the proper phase between the fundamental and the double fundamental frequency. Simulation and experimental results verify the effectiveness and validity of the proposed NLM scheme.

Abstract: The increasing interest in multiphase drive systems has led to the extension of inverter topologies and pulse width modulation (PWM) methods from three-phase to multiphase occasions. Carrier-based PWM (CPWM) dominates space vector PWM when the phase number increases, because of its simple computation and modular implementation. Although intensive work has been done on modifying PWM methods to reduce the common-mode voltage (CMV), not enough work has been done on CPWM methods with CMV reduction for multiphase drives. This paper extends the phase-shifted sinusoidal PWM (PS-SPWM) method for five-phase and six-phase two-level voltage-source inverters (VSI) and employs the intersection-plotting method and Fourier analysis to reveal the nature of the CMV. Both experiment and simulation results comply with theoretical analysis that compared with the conventional SPWM, the PS-SPWM can effectively reduce the CMV in peak-to-peak value and RMS value, though it leads to a higher phase current distortion. In addition, the hardware realization of PS-SPWM for multiphase inverters by a distributed control system is presented in this paper.

Abstract: This paper presents a tri-mode digital buck converter in ${0}.{18}\hbox{-}\upmu \text {m}$ CMOS technology for photovoltaic energy harvesting. The on-chip gate-boosted digital pulsewidth modulation (DPWM) improves the conversion efficiency at heavy load conditions. Pulse–frequency modulation (PFM) along with digital self-tracking zero current detection is proposed to avoid reverse current at light load. The asynchronous mode (AM) operation further reduces the controller loss and improves the conversion efficiency at ultra-light load conditions. By applying DPWM, PFM, and AM at different load conditions, the proposed converter provides a maximum conversion efficiency of 92% with output power ranging from 50 nW to 10 mW. In addition, the proposed buck converter achieves more than 70% efficiency from 400 nW to 10 mW output power.

Abstract: This paper proposes a bidirectional three-level LLC resonant converter with a new pulse width and amplitude modulation control method. With different control signals, it has three different operation modes with different voltage gains. Therefore, it can achieve wide voltage gain range by switching among these three modes, which is attractive for energy storage system applications needing wide voltage variation. The proposed topology operates with constant switching frequency, which is easy to implement with digital control, and it can achieve soft switching for all the switches and diodes in the circuit as a conventional LLC resonant converter. The performance of the proposed converter is validated by the experimental results from a 1-kW prototype with 20 A maximum output current.

Abstract: This paper proposes a power predictive control (PPC) method for three-phase pulse width modulated rectifiers without a proportional-integral controller. The proposed PPC method calculates the optimized voltage vector by analyzing the relationship between the virtual flux, active power, converter voltage, and filter parameters. Thus, an overshoot does not occur and the fast and accurate power control becomes possible. The predictive algorithm computes the power error that would be produced by applying each vector and selects the one that contributes the minimum error. The simulation and experimental results prove that the proposed method provides an excellent steady-state performance and quick dynamic response.

Abstract: A capacitor voltage-balancing method for a nested neutral point clamped (NNPC) inverter is proposed in this paper. The NNPC inverter is a newly developed four-level voltage-source inverter for medium-voltage applications with properties such as operating over a wide range of voltages (2.4–7.2 kV) without the need for connecting power semiconductor in series and high-quality output voltage. The NNPC topology has two flying capacitors in each leg. In order to ensure that the inverter can operate normally and all switching devices share identical voltage stress, the voltage across each capacitor should be controlled and maintained at one-third of dc bus voltage. The proposed capacitor voltage-balancing method takes advantage of redundancy in phase switching states to control and balance flying capacitor voltages. Simple and effective logic tables are developed for the balancing control. The proposed method is easy to implement and needs very few computations. Moreover, the method is suitable for and easy to integrate with different pulse width modulation schemes. The effectiveness and feasibility of the proposed method is verified by simulation and experiment.

Abstract: In this paper, a single-stage solution for solar photovoltaic (PV) pumping system using a dual-inverter fed open-end winding induction motor drive is presented. The three-level dual-inverter requires a low PV bus voltage compared with its conventional three-level counterpart. This could avoid large string of PV modules and helps in reducing the voltage rating of the capacitors and semiconductor devices used in the system. This may further help in reduction of cost of the system. The proposed single-stage system is operated using an integrated control algorithm, which includes the maximum power point tracking (MPPT), the $V/f$ control, and the sample-averaged zero-sequence elimination (SAZE) pulsewidth modulation (PWM) technique. While the MPPT algorithm ensures the extraction of maximum power from the PV source, the $V/f$ control improves the motor pump performance. Furthermore, the zero-sequence current is avoided by the SAZE PWM algorithm. Thus, the integrated control algorithm improves the overall performance of the system. Furthermore, this paper also presents the details of system design and analysis of its dynamic behavior during transient environmental conditions. The performance of the system is verified using MATLAB simulation and hardware prototype.

Abstract: A new pulsewidth modulation (PWM) strategy which is an alternative approach of the discontinuous PWM (DPWM) for a three-level neutral-point-clamped (NPC) inverter is proposed in this paper. A three-level NPC inverter is completely mature and very well-established topology in high-power applications. However, the three-level NPC inverter has an inheritance problem of the neutral-point voltage unbalancing due to the split dc-link capacitors. This structure can cause large neutral-point voltage ripple. Furthermore, output currents of the three-level NPC inverter are distorted by the neutral-point voltage ripple. Therefore, the neutral-point voltage must be controlled. In this paper, a new DPWM method using two different offsets for the neutral-point ripple reduction is proposed and the effectiveness of the proposed DPWM method is verified by using the simulation and the experimental results.

Abstract: This study presents a novel overmodulation strategy for a six-phase voltage source inverter (VSI)-fed dual three-phase permanent-magnet synchronous motor. The proposed strategy can achieve minimum harmonic injection in the overmodulation region. Four-vector space vector pulse width modulation (SVPWM) renders mathematic foundations for this given method. However, the classical four-vector SVPWM used in six-phase VSI has asymmetrical pulse width modulation waveform, which makes it difficult for hardware implementation. In this paper, the modulation algorithms in both linear and overmodulation regions have been unified and implemented with the double zero-sequence injection PWM strategy. This strategy is able to overcome the inherent shortcomings of the four-vector SVPWM, and it achieves smooth transitions from linear to overmodulation region. Simulation analysis and experimental results demonstrate the effectiveness and feasibility of the proposed strategy.