TL;DR: In this paper, a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC) is presented.
Abstract: This paper describes a modified phase-shifted carrier-based pulsewidth-modulation (PSC-PWM) scheme for modular multilevel converters (MMC). In order to reduce the average device switching frequency, a reduced switching-frequency (RSF) voltage balancing algorithm is developed. This paper also proposes a circulating current suppressing controller (CCSC) to minimize the inner circulating current in an MMC. Based on the double line-frequency, negative-sequence rotational frame, the three-phase alternative circulating currents are decomposed into two dc components and are minimized by a pair of proportional integral controllers. Simulation results based on a detailed PSCAD/EMTDC model prove the effectiveness of the modified PSC-PWM method and the RSF voltage-balancing algorithm. The proposed CCSC not only eliminates the inner circulating current but also improves the quality of the converter ac output voltage. A simple loss evaluation demonstrates that the RSF voltage-balancing algorithm and the CCSC reduce the converter power losses.
TL;DR: This paper provides a systematic approach to the design of filter-based active damping methods with tuning procedures, performance, robustness, and limitations discussed with theoretical analysis, selected simulation, and experimental results.
Abstract: Pulsewidth modulation (PWM) voltage source converters are becoming a popular interface to the power grid for many applications. Hence, issues related to the reduction of PWM harmonics injection in the power grid are becoming more relevant. The use of high-order filters like LCL filters is a standard solution to provide the proper attenuation of PWM carrier and sideband voltage harmonics. However, those grid filters introduce potentially unstable dynamics that should be properly damped either passively or actively. The second solution suffers from control and system complexity (a high number of sensors and a high-order controller), even if it is more attractive due to the absence of losses in the damping resistors and due to its flexibility. An interesting and straightforward active damping solution consists in plugging in, in cascade to the main controller, a filter that should damp the unstable dynamics. No more sensors are needed, but there are open issues such as preserving the bandwidth, robustness, and limited complexity. This paper provides a systematic approach to the design of filter-based active damping methods. The tuning procedures, performance, robustness, and limitations of the different solutions are discussed with theoretical analysis, selected simulation, and experimental results.
TL;DR: In this paper, the most common multilevel inverter topologies and control schemes have been reviewed, and the selection of topology and control techniques may vary according to power demands of inverter.
TL;DR: This paper presents first an overview of the well-known voltage and current dc-link converter topologies used to implement a three-phase PWM ac-ac converter system, and a common knowledge basis of the individual converterTopologies is established.
Abstract: This paper presents first an overview of the well-known voltage and current dc-link converter topologies used to implement a three-phase PWM ac-ac converter system. Starting from the voltage source inverter and the current source rectifier, the basics of space vector modulation are summarized. Based on that, the topology of the indirect matrix converter (IMC) and its modulation are gradually developed from a voltage dc-link back-to-back converter by omitting the dc-link capacitor. In the next step, the topology of the conventional (direct) matrix converter (CMC) is introduced, and the relationship between the IMC and the CMCs is discussed in a figurative manner by investigating the switching states. Subsequently, three-phase ac-ac buck-type chopper circuits are considered as a special case of matrix converters (MCs), and a summary of extended MC topologies is provided, including three-level and hybrid MCs. Therewith, a common knowledge basis of the individual converter topologies is established.
TL;DR: In this article, a comprehensive analysis and experimental results with pulsewidth-modulation (PWM) control of the dual-active-bridge (DAB) topology is presented.
Abstract: The dual-active-bridge (DAB) topology is ideally suited for high-power dc-dc conversion, especially when bidirectional power transfer is required. However, it has the drawback of high circulating currents and hard switching at light loads, if wide variation in input and output is expected. To address these issues, this paper presents a comprehensive analysis and experimental results with pulsewidth-modulation (PWM) control of the DAB. The PWM control is in addition to phase-shift modulation between the two H-bridges. The analysis addresses PWM of one bridge at a time and of both bridges simultaneously. In the latter, five distinct modes arise based on the choice of PWM and load condition. The possibilities are analyzed for optimizing power density and efficiency for low-load operation. Finally, a composite scheme combining single and dual PWM is proposed that extends the soft-switching range down to zero-load condition, reduces rms and peak currents, and results in significant size reduction of the transformer. Experimental results are presented with a 10-kW prototype.
TL;DR: In this paper, the minimum ripple energy storage requirement is derived independently of a specific topology, and the feasibility of the active capacitor's reduction schemes is verified based on the minimum energy requirement, which can effectively reduce the energy storage capacitance.
Abstract: It is well known that single-phase pulse width modulation rectifiers have second-order harmonic currents and corresponding ripple voltages on the dc bus. The low-frequency harmonic current is normally filtered using a bulk capacitor in the bus, which results in low power density. However, pursuing high power density in converter design is a very important goal in the aerospace applications. This paper studies methods for reducing the energy storage capacitor for single-phase rectifiers. The minimum ripple energy storage requirement is derived independently of a specific topology. Based on the minimum ripple energy requirement, the feasibility of the active capacitor's reduction schemes is verified. Then, we propose a bidirectional buck-boost converter as the ripple energy storage circuit, which can effectively reduce the energy storage capacitance. The analysis and design are validated by simulation and experimental results.
TL;DR: This paper proposes a single-phase seven-level inverter for grid-connected photovoltaic systems, with a novel pulsewidth-modulated (PWM) control scheme, which was verified through simulation and implemented in a prototype.
Abstract: This paper proposes a single-phase seven-level inverter for grid-connected photovoltaic systems, with a novel pulsewidth-modulated (PWM) control scheme. Three reference signals that are identical to each other with an offset that is equivalent to the amplitude of the triangular carrier signal were used to generate the PWM signals. The inverter is capable of producing seven levels of output-voltage levels (Vdc, 2Vdc/3, Vdc/3, 0, -Vdc, -2Vdc/3, -Vdc/3) from the dc supply voltage. A digital proportional-integral current-control algorithm was implemented in a TMS320F2812 DSP to keep the current injected into the grid sinusoidal. The proposed system was verified through simulation and implemented in a prototype.
TL;DR: In this paper, an algorithm based on dc link voltage is proposed for effective energy management of a standalone permanent magnet synchronous generator (PMSG)-based variable speed wind energy conversion system consisting of battery, fuel cell, and dump load (i.e., electrolyzer).
Abstract: In this paper, a novel algorithm, based on dc link voltage, is proposed for effective energy management of a standalone permanent magnet synchronous generator (PMSG)-based variable speed wind energy conversion system consisting of battery, fuel cell, and dump load (i.e., electrolyzer). Moreover, by maintaining the dc link voltage at its reference value, the output ac voltage of the inverter can be kept constant irrespective of variations in the wind speed and load. An effective control technique for the inverter, based on the pulsewidth modulation (PWM) scheme, has been developed to make the line voltages at the point of common coupling (PCC) balanced when the load is unbalanced. Similarly, a proper control of battery current through dc-dc converter has been carried out to reduce the electrical torque pulsation of the PMSG under an unbalanced load scenario. Based on extensive simulation results using MATLAB/SIMULINK, it has been established that the performance of the controllers both in transient as well as in steady state is quite satisfactory and it can also maintain maximum power point tracking.
TL;DR: In this article, the authors proposed a high-performance pulsewidth modulation (PWM) algorithm with reduced common-mode voltage (CMV) and satisfactory overall performance for three-phase PWM inverter drives.
Abstract: A high-performance pulsewidth modulation (PWM) algorithm with reduced common-mode voltage (CMV) and satisfactory overall performance is proposed for three-phase PWM inverter drives. The algorithm combines the near-state PWM (NSPWM) method that has superior overall performance characteristics at high modulation index, and MAZSPWM, a modified form of the active zero-state PWM method (AZSPWM1), which is suitable for low modulation index range of operation. Since AZSPWM1 has line-to-line voltage pulse reversals with small zero-voltage time intervals, in its naive form, it causes overvoltages, in particular in long-cable motor drive applications. Obtained by reorganizing the duty cycles of the utilized voltage vectors of AZSPWM1, MAZSPWM has sufficiently long zero-voltage time intervals between pulse reversals such that during pulse reversals, overvoltages are avoided. The combined algorithm performs satisfactorily throughout the inverter operating range and the transition from NSPWM to MAZSPWM and vice versa is seamless. The performance of the proposed algorithm is proven by theory, computer simulations, and detailed laboratory experiments. The paper also shows that the proposed reduced CMV PWM algorithm is effective in reducing the motor leakage current, and it is most beneficial when a small common-mode inductor is included in the drive.
TL;DR: This paper presents a solution to improve the already mentioned drawbacks of ACHB inverters by using a high-frequency link using only one dc power source, which can be selected according to the application (regenerative, nonregeneration, and with variable or permanent voltage amplitude).
Abstract: Multilevel inverters are in state-of-the-art power conversion systems due to their improved voltage and current waveforms. Cascaded H-bridge (CHB) multilevel inverters have been considered as an alternative in the medium-voltage converter market and experimental electric vehicles. Their variant, the asymmetrical CHB (ACHB) inverter, optimizes the number of voltage levels by using dc supplies with different voltages. However, the CHB and ACHB inverters require a large number of bidirectional and isolated dc supplies that must be balanced, and as any multilevel inverter, they reduce the power quality with the voltage amplitude. This paper presents a solution to improve the already mentioned drawbacks of ACHB inverters by using a high-frequency link using only one dc power source. This single power source can be selected according to the application (regenerative, nonregenerative, and with variable or permanent voltage amplitude). This paper shows the experimental results of a 27-level ACHB inverter with a variable and single dc source, but the strategy can be applied to any ACHB inverter with any single dc source. As a result, the reduction of active semiconductors, transformers, and total harmonic distortion was achieved using only one dc power source.
TL;DR: The novelty of the proposed system lies in extension of the generic DPC-SVM scheme by additional higher harmonic and voltage dips compensation modules and implementation of the whole algorithm in a single chip floating point microcontroller.
Abstract: Power electronic Grid-Connected Converters (GCCs) are widely applied as grid interface in renewable energy sources. This paper proposes an extended Direct Power Control with Space Vector Modulation (DPC-SVM) scheme with improved operation performance under grid distortions. The real-time operated DPC-SVM scheme has to execute several important tasks as: space vector pulse width modulation, active and reactive power feedback control, grid current harmonics and voltage dips compensation. Thus, development and implementation of the DPC-SVM algorithm using single chip floating-point microcontroller TMS320F28335 is described. It combines large peripheral equipment, typical for microcontrollers, with high computation capacity characteristic for Digital Signal Processors (DSPs). The novelty of the proposed system lies in extension of the generic DPC-SVM scheme by additional higher harmonic and voltage dips compensation modules and implementation of the whole algorithm in a single chip floating point microcontroller. Overview of the laboratory setup, description of basic algorithm subtasks sequence, software optimization as well as execution time of specific program modules on fixed-point and floating-point processors are discussed. Selected oscillograms illustrating operation and robustness of the developed algorithm used in 5 kVA laboratory model of the GCC are presented.
TL;DR: In this article, a number of predictive control concepts are rapidly emerging, and their characteristic hyperbolic tradeoff functions are derived, compared with each other, and benchmarked with respect to PWM and offline optimized pulse patterns (OPPs).
Abstract: Control and modulation schemes for ac electrical drives synthesize switched three-phase voltage waveforms that control the electrical machine. Particularly in medium-voltage applications, the aim is to minimize both the switching losses in the inverter and the harmonic distortions of the stator currents and the torque. For a given modulation scheme, lower switching losses usually imply higher distortion factors and vice versa. This tradeoff can be described by a hyperbolic function, as shown in this paper for pulsewidth modulation (PWM). A number of predictive control concepts are rapidly emerging. Their characteristic hyperbolic tradeoff functions are derived, compared with each other, and benchmarked with respect to PWM and offline optimized pulse patterns (OPPs). It is shown that predictive schemes with long prediction horizons shift the performance tradeoff curve toward the origin, thus lowering both the switching losses and the harmonic distortions. As a result, at steady-state operating conditions, these predictive schemes achieve a performance similar to OPPs, while providing a superior dynamic performance during transients.
TL;DR: In this paper, the authors have proposed three different carrier pulse width modulation techniques, which can reduce the total harmonic distortion and enhance the output voltages from a five level inverter, adopting the constant switching frequency, variable switching frequency (VSF), and phase shifted pulsewidth modulation (PSPWM) concepts.
Abstract: Multilevel inverter is used in applications that need high voltage and high current. The topologies of multilevel inverter have several advantages such as lower total harmonic distortion (THD), lower electro magnetic interference (EMI) generation, high output voltage. The main feature of multilevel inverter is the ability to reduce the voltage stress on each power device due to the utilisation of multilevel on the DC bus. The advent of multilevel inverter topologies has caused variety of pulse width modulation strategies. In this paper, various carrier pulse width modulation techniques are proposed, which can minimise the total harmonic distortion and enhances the output voltages from five level inverter. Three methodologies adopting the constant switching frequency (CSF), variable switching frequency (VSF), and phase shifted pulse width modulation (PSPWM) concepts are proposed in this paper. The above methodologies divided into two techniques like subharmonic pulse width modulation which minimises total harmonic distortion and switching frequency optimal pulse width modulation which enhances the output voltages. Field programmable gate array (FPGA) has been chosen to implement the pulse width modulation due its fast proto typing, simple hardware and software design. The simulation and experimental results are presented.
TL;DR: This paper presents a control method to limit the common-mode (CM) circulating current between paralleled three-phase two-level voltage-source converters (VSCs) with discontinuous space-vector pulsewidth modulation (DPWM) and interleaved switching cycles, presenting a minimum impact on the converter thermal design.
Abstract: This paper presents a control method to limit the common-mode (CM) circulating current between paralleled three-phase two-level voltage-source converters (VSCs) with discontinuous space-vector pulsewidth modulation (DPWM) and interleaved switching cycles. This CM circulating current can be separated into two separate components based on their frequency; the high-frequency component, close to the switching frequency, can be effectively limited by means of passive components; the low-frequency component, close to the fundamental frequency, embodies the jumping CM circulating current observed in parallel VSCs. This is the main reason why it is usually recommended not to implement discontinuous and interleaving PWM together. The origin of this low-frequency circulating current is analyzed in detail, and based on this, a method to eliminate its presence is proposed by impeding the simultaneous use of different zero vectors between the converters. This control method only requires six additional switching actions per line cycle, presenting a minimum impact on the converter thermal design. The analysis and the feasibility of the control method are verified by simulation and experimental results.
TL;DR: In this article, the authors compared traditional inverters against the Z-source inverter with a built-in impedance network, with modification to the traditional pulse width modulated (PWM) signal.
Abstract: Traditional voltage source inverter (VSI) and current source inverter (CSI) technology has advanced to the new Z-source inverter (ZSI) with a built-in impedance network, with modification to the traditional pulse width modulated (PWM) signal. Modified PWM signal accommodates the shoot-through (ST) signal (which would destroy the traditional inverters) in order to buck or boost the DC input voltage from a value between zero and infinity. The unique impedance network of passive elements, which gives a single-stage conversion, needs to be understood in detail in order to design a ZSI. The study compares traditional inverters against the ZSI and discusses the detailed operation modes involved. Circuit calculations, self-boost phenomenon, ST, inductor and capacitor design calculations, boost control methods and device selection procedures are discussed. Photovoltaic source (PV) being one of the most promising DC sources of the future, a design example involving PV and all the circuit calculations along with matching simulation results, are provided in this study.
TL;DR: The presented SV-PWM strategy makes it possible to control the neutral point voltage by optimum choice of switch sequence for any position and length of output voltage vector by selecting optimum vectors and their on-time durations in order to reduce quickly the dc-link voltage unbalance.
Abstract: This paper proposes a new space-vector pulsewidth modulation (SV-PWM) strategy for a three-level neutral point clamped inverter. The presented SV-PWM strategy makes it possible to control the neutral point voltage by optimum choice of switch sequence for any position and length of output voltage vector. The proposed solution takes into consideration the unbalance of the dc-link voltages. It also analyzes the influence of vector sequences on the predicted unbalance of the dc-link voltage. The solution allows selecting optimum vectors and their on-time durations in order to reduce quickly the dc-link voltage unbalance. The calculation of the space vector area proposed in this paper takes into consideration voltage unbalance and its influence on the length and position of vectors. The proposed approach assures properly generating the voltage output vectors, even in the case of the existing large voltage unbalance in the dc-link. The results of the experimental investigation of the proposed modulation strategy are presented in this paper.
TL;DR: In this article, the authors further developed harmonics injection and equal area criteria-based four-equation method to realize OPWM for two-level inverters and multilevel inverters with unbalanced dc sources.
Abstract: In medium-/high-power inverters, optimal pulse-width modulation (OPWM) is often used to reduce the switching frequency and at the same time, realize selective harmonic elimination (SHE). For both two-level and multilevel inverters, most selective harmonic elimination (SHE) studies are based on solving multiple variable high-order nonlinear equations. Furthermore, for multilevel inverters, SHE has been often studied based on the assumption of balanced dc levels and single switching per level. In this paper, the authors further developed harmonics injection and equal area criteria-based four-equation method to realize OPWM for two-level inverters and multilevel inverters with unbalanced dc sources. For the cases, where only small number of voltage levels are available, weight oriented junction point distribution is utilized to enhance the performance of the four-equation method. A case study of multilevel inverter at low-modulation index is used as an example. Compared with existing methods, the proposed method does not involve complex equation groups and is much easier to be utilized in the case of large number of switching angles, or multiple switching angles per voltage level in multilevel inverters.
TL;DR: In this article, a comparison of inverter losses with sinusoidal pulsewidth modulation (PWM), space vector PWM and discontinuous PWM (DPWM) is presented, concluding that DPWM is the method of choice.
Abstract: In this paper, losses in a 4-kVA three-phase voltage-sourced inverter designed to drive an induction machine, are investigated. A comparison of inverter losses with sinusoidal pulsewidth modulation (PWM), space vector PWM and discontinuous PWM (DPWM) is presented, concluding that DPWM is the method of choice. These PWM schemes are implemented using a field-programmable gate array and modeled in Pspice. PWM excitation models are combined with an inverter model that incorporates the Hefner model for the insulated gate bipolar transistors. After verification of the complete inverter model with calorimetric measurements, the model is used to predict inverter losses under various conditions of modulation index, switching frequency, and gate resistance for each of the PWM scheme. A breakdown of losses into conduction and switching losses is presented. Moreover, the effects of different DPWM variants on inverter losses are also being considered. Overall, the use of DPWM is found to give minimum losses as a consequence of the reduced number of switching transitions.
TL;DR: A modified Z-source inverter with specific modulation techniques is proposed to reduce leakage currents in three-phase transformerless photovoltaic (PV) systems and results are obtained to validate the theoretical and simulation models.
Abstract: In this paper, a modified Z-source inverter (ZSI) with specific modulation techniques is proposed to reduce leakage currents in three-phase transformerless photovoltaic (PV) systems. The new topology only requires an additional fast-recovery diode when compared with the original structure. On the other hand, the pulsewidth modulation technique is entirely modified in order to reduce the leakage currents through the conduction path. Simulation results for the three-phase transformerless PV system operating in two cases, i.e., connected to a grid and connected to a grounded RL load, are presented. Experimental results of leakage currents in three-phase ZSIs connected to a RL load are obtained to validate the theoretical and simulation models.
TL;DR: The proposed FB SRC features a novel two-mode operation that exhibits high conversion efficiency for wide-range load conditions and the relationships among the voltage gain, the switching frequency, and the effective duty cycle are discussed and analyzed.
Abstract: This paper presents the design of a phase-shifted full-bridge series resonant converter (PS-FB SRC). The proposed FB SRC features a novel two-mode operation. It is operated in series resonant mode at normal loads. The switching frequency is varied to regulate the output voltage. The fixed-frequency phase-shifted pulse width modulation, on the other hand, is used to adjust the effective duty cycle and regulate the output voltage at light loads. The proposed converter exhibits high conversion efficiency for wide-range load conditions. The relationships among the voltage gain, the switching frequency, and the effective duty cycle are discussed and analyzed. Finally, a 48-V/42-A prototype is implemented. Experiments are conducted to verify the theoretical analysis.
TL;DR: A control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polity of the FC voltage, and the pol parity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation.
Abstract: A five-level flying-capacitor (FC)-based active-neutral-point-clamped (ANPC) converter is an arrangement of a three-level ANPC converter and a two-level cell. In this paper, a control strategy is proposed to regulate the voltage across the FCs at their respective reference voltage levels by swapping the switching patterns of the switches based on the polarity of the output current, the polarity of the FC voltage, and the polarity of the fundamental line-to-neutral voltage under selective harmonic elimination pulsewidth modulation. The voltage across the FCs and the dc-link capacitors are simultaneously controlled at their reference voltage levels. The proposed control strategy is applied using power system computer aided design/electromagnetic transients including dc on a static synchronous compensator operating under a power-factor-correction mode to verify its performance. Experimental results are also presented for low and high number of angles per quarter period using a low-power laboratory prototype.
TL;DR: In this paper, the attenuation characteristics of electromagnetic interference (EMI) filters in practice often differ from theoretical predictions and minor changes can result in a significant improvement in performance, and a concept to significantly reduce CM emissions is discussed in detail.
Abstract: The attenuation characteristics of electromagnetic interference (EMI) filters in practice often differ from theoretical predictions and minor changes can result in a significant improvement in performance. The performance of the differential-mode (DM) filter stage can usually be well predicted, but the common mode (CM) behavior is more difficult to handle. This is especially true for three-phase pulsewidth modulation (PWM) rectifier systems, which inherently show a large high-frequency CM voltage at the rectifier output. Possible CM noise current paths of a three-phase/level PWM rectifier are analyzed in this paper where parasitic capacitances to the heat sink and to earth are considered. In addition, a concept to significantly reduce CM emissions is discussed in detail. Based on the proposed models, an EMI filter design for a system with 1 MHz switching frequency is shown. Experimental verification of the designed EMI filter is presented by impedance and conducted emission (CE) measurements taken from a 10 kW prototype. Several practical aspects of filter implementation such as component arrangement, shielding layers, magnetic coupling, etc., are discussed and verified by measurements.
TL;DR: In this article, a general algorithm is proposed and adapted for dealing with the control of the three-level NPC inverter and also the Z-source converter, and experimental results corroborate the proposed technique.
Abstract: This article reviews the nonsinusoidal CPWM and SVPWM techniques and deals with the three possibilities of calculation of pulsewidths after the addition of a zero-sequence signal. A general algorithm is proposed and adapted for dealing with the control of the three-level NPC inverter and also the Z-source converter. Experimental results corroborate the proposed technique.
TL;DR: A new phase-current reconstruction method, switching-state phase shift (SSPS), is proposed based on the PWM pattern modification, which can realize high-quality reconstruction to the phase current with less impacts on the output current ripples and switching losses.
Abstract: Instead of directly sampling the phase currents, a technique that adopts a single current sensor in the dc link to reconstruct three-phase currents has arisen. Through this approach, the cost of servo systems can be reduced and the reliability can be improved. However, the duration of an effective vector may be so short that the phase current cannot be measured reliably by the conventional space-vector pulsewidth modulation (PWM) algorithm. In this paper, a new phase-current reconstruction method, switching-state phase shift (SSPS), is proposed based on the PWM pattern modification. The modification is performed by applying phase shifts to the switching-state waveforms of the inverter. The algorithm can realize high-quality reconstruction to the phase current with less impacts on the output current ripples and switching losses. Moreover, it can maximize the linear-modulation region by saturation handling. Measurements on the permanent-magnet synchronous motor servo drives show that the SSPS can offer an attractive performance during both steady-state and dynamic operations in the phase-current reconstruction and regulation.
TL;DR: A 556 Hz system utilizing a three-frequency algorithm for simultaneously measuring multiple objects and an optimal pulse width modulation (OPWM) technique that can selectively eliminate high-order harmonics of squared binary patterns are developed.
Abstract: The technique of generating sinusoidal fringe patterns by defocusing squared binary structured ones has numerous merits for high-speed three-dimensional (3D) shape measurement. However, it is challenging for this method to realize a multifrequency phase-shifting (MFPS) algorithm because it is difficult to simultaneously generate high-quality sinusoidal fringe patterns with different periods. This paper proposes to realize an MFPS algorithm utilizing an optimal pulse width modulation (OPWM) technique that can selectively eliminate high-order harmonics of squared binary patterns. We successfully develop a 556 Hz system utilizing a three-frequency algorithm for simultaneously measuring multiple objects.
TL;DR: In this article, a switching frequency reduction method based on the junction temperature variation (ΔTj) of an inverter IGBT was proposed to reduce the pulsewidth modulation frequency under low-speed higher torque condition.
Abstract: Studies show that the power cycling mean time to failure (MTTF) of the insulated-gate bipolar transistor (IGBT) bond wire in an adjustable speed drive may be very short under some very common conditions. This paper proposes a switching frequency reduction method based on the junction temperature variation (ΔTj) of an inverter IGBT. It has the following advantages. First, it reduces the pulsewidth-modulation frequency under low-speed higher torque condition. Second, the inverter is started more smoothly and safely under higher command switching frequency and high-torque condition. Third, the overall MTTF of the inverter IGBT can be improved. The theory analysis, simulation, and experimental result are provided to show these advantages.
TL;DR: This paper designs, constructs, and tests a single-phase downscaled BTB system rated at 120 V and 3.3 kW to verify the viability and effectiveness, leading to the actual system.
Abstract: This paper discusses the control and design of the 6.6-kV back-to-back (BTB) system combining bidirectional isolated dc/dc converters and modular multilevel cascade pulsewidth modulation (PWM) converters. The system consists of multiple converter cells connected in cascade per phase at both front ends. Each converter cell consists of a bidirectional isolated medium-frequency dc/dc converter and two voltage-source H-bridge (single-phase full-bridge) PWM converters. Extremely low-voltage steps bring a significant reduction in harmonics and electromagnetic interference emissions to the BTB system. This paper designs, constructs, and tests a single-phase downscaled BTB system rated at 120 V and 3.3 kW to verify the viability and effectiveness, leading to the actual system.
TL;DR: A hybrid pulsewidth modulation (PWM), combining the merits of both space-vector PWM and selective harmonic elimination (SHE) PWM (SHEPWM), is proposed for three-level neutral-point-clamped (NPC) inverter-fed high-power adjustable-speed drives, which uses asynchronous SVPWM at low frequency and SHEPWM at high frequency.
Abstract: A hybrid pulsewidth modulation (PWM), combining the merits of both space-vector PWM (SVPWM) and selective harmonic elimination (SHE) PWM (SHEPWM), is proposed for three-level neutral-point-clamped (NPC) inverter-fed high-power adjustable-speed drives, which uses asynchronous SVPWM at low frequency and SHEPWM at high frequency. For SHEPWM, a novel formula is proposed to obtain the initial values of switching angles, leading to another valid solution that is different from the known ones in the literature. Furthermore, it is shown that, by eliminating the quarter-wave symmetry, unlimited groups of solutions to three-level SHEPWM can be obtained. The characteristics of the multiple solutions in terms of harmonic distribution, pulsewidth, and total harmonic distortion are investigated for the application of SHE in practical drives. Switching between SVPWM and SHEPWM is problematic if no appropriate measure is taken, particularly when the influence of the minimum pulsewidth (MPW) is considerable. A simple but effective method, taking into account the MPW, is proposed in this paper to address this problem. The multiple groups of solutions to SHE are simulated and experimentally verified on a low-voltage three-level NPC inverter prototype. Experimental results obtained from a low-voltage prototype and an industrial 6-kV/1250-kW three-level drive are presented to validate the smooth switching between SVPWM and SHEPWM.
TL;DR: Two space-vector-based pulsewidth modulation strategies are described, which are used to synthesize a four-level waveform from an open-end winding configuration of an induction motor, and it is shown that one of the two PWM techniques results in a better spectral performance and lower switching power loss in the overall dual-inverter system compared to the equal-duty SVPWM.
Abstract: In this paper, two space-vector-based pulsewidth modulation (PWM) (SVPWM) strategies named equal- and proportional-duty SVPWMs are described, which are used to synthesize a four-level waveform from an open-end winding configuration of an induction motor. Two isolated dc-link voltages, which are in the ratio of 2 : 1, are employed to achieve this objective. Both of these PWM strategies achieve the avoidance of overcharging of the dc-link capacitor of an inverter operating with lower dc-link voltage by its counterpart with higher dc-link voltage. Implementation of these PWM strategies requires only the instantaneous three-phase reference voltages, eliminating the need of sector identification or lookup tables. The numbers of samples per cycle for individual inverters are selected in such a way that the quarter-wave, half-wave, and three-phase symmetries are achieved for the dual-inverter drive despite unequal dc-link voltages for the constituent inverters. It is also shown that one of the two PWM techniques, called the proportional-duty SVPWM, results in a better spectral performance and lower switching power loss in the overall dual-inverter system compared to the equal-duty SVPWM.
TL;DR: A dual-pack heat exchanger assembly is designed to be used in consumer and industrial fluid pipeline systems and it is proved to be suitable for hot water, steam, and superheated steam producers.
Abstract: This paper presents a novel high-frequency soft-switching power conversion circuit for high-power induction heating (IH) applications such as the following: (1) heat treatment of metals; (2) hot water; and (3) superheated steam producers. This high-frequency power conversion circuit can operate from single-phase or three-phase systems to produce high current for high-power IH applications under the principles of soft-switching operation. It can regulate its ac output power from the rated value to a low power level. A dual-mode control scheme based on high-frequency pulse width modulation (PWM), in synchronization with the utility frequency positive and negative half-cycles, and pulse density modulation (PDM) is proposed to extend the soft-switching operating range for wide-output power regulation. A dual-pack heat exchanger assembly is designed to be used in consumer and industrial fluid pipeline systems and it is proved to be suitable for hot water, steam, and superheated steam producers. Experimental and simulation results are given to verify the operating principles of the proposed power conversion circuit and to evaluate its power regulation and conversion efficiency.