TL;DR: In this article, the authors present the application of predictive current control in a voltage source inverter using a discrete-time model of the system to predict the future value of the load current for all possible voltage vectors generated by the inverter.
Abstract: This work presents the application of predictive current control in a voltage source inverter. The method uses a discrete-time model of the system to predict the future value of the load current for all possible voltage vectors generated by the inverter. The voltage vector which minimizes the current error at the next sampling time is selected. The performance of the proposed predictive control method is compared with hysteresis and PWM control. The results show that the predictive method controls very effectively the load current and compares very well with the classical solutions.
TL;DR: DPC-SVM exhibits several features, such as a simple algorithm, good dynamic response, constant switching frequency, and particularly it provides sinusoidal line current when supply voltage is not ideal, which has proven excellent performance and verify the validity of the proposed system.
Abstract: This paper proposes a novel and simple direct power control of three-phase pulsewidth-modulated (PWM) rectifiers with constant switching frequency using space-vector modulation (DPC-SVM). The active and reactive powers are used as the pulse width modulated (PWM) control variables instead of the three-phase line currents being used. Moreover, line voltage sensors are replaced by a virtual flux estimator. The theoretical principle of this method is discussed. The steady-state and dynamic results of DPC-SVM that illustrate the operation and performance of the proposed system are presented. It is shown that DPC-SVM exhibits several features, such as a simple algorithm, good dynamic response, constant switching frequency, and particularly it provides sinusoidal line current when supply voltage is not ideal. Results have proven excellent performance and verify the validity of the proposed system.
TL;DR: In this article, a motor control device selectively turns on or off a drive transistor in-accordance with a PWM control signal, such that a drive current supplied to a motor is adjusted.
Abstract: A motor control device selectively turns on or off a drive transistor in-accordance with a PWM control signal Sp, such that a drive current Im supplied to a motor is adjusted. The device also samples and holds a motor current Sm for obtaining a motor current value Ih. With reference to the motor current value Ih, the device protects the motor from an overcurrent. Sampling and holding of the motor current Sm is performed for a sampling and holding time Ts. The sampling and holding time Ts corresponds to a time period between a first point in time when the level of the PWM control signal Sp is switched for turning off the drive transistor and a second point in time that precedes the first point in time by a predetermined period. As a result, the motor current value Ih is detected with high accuracy.
TL;DR: In this paper, a new modulation approach based on the virtual space vector concept is proposed for the complete control of the neutral point voltage in the three-level three-phase neutral-point-clamped voltage source inverter.
Abstract: This letter presents a new modulation approach for the complete control of the neutral-point voltage in the three-level three-phase neutral-point-clamped voltage source inverter. The new modulation approach, based on the virtual space vector concept, guarantees the balancing of the neutral-point voltage for any load (linear or nonlinear) over the full range of converter output voltage and for all load power factors, the only requirement being that the addition of the output three-phase currents equals zero. The implementation of the proposed modulation is simple according to the phase duty-ratio expressions presented. These expressions are only dependent on the modulation index and reference vector angle. The performance of this modulation approach and its benefits over other previously proposed solutions are verified experimentally.
TL;DR: In this article, a PWM switching strategy was proposed to eliminate common mode voltage using the open-end winding configuration for the induction motor using a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.
Abstract: Pulse-width modulated (PWM) inverters are known to generate common mode voltages which cause motor bearing currents in the induction motor drives. They also result in leakage currents which act as sources of conducted electromagnetic interference in the drive system. The common mode voltage generated by a conventional three-level inverter can be eliminated by switching only the voltage space vectors which do not produce the common mode voltage. This paper presents a PWM switching strategy to eliminate common mode voltage using the open-end winding configuration for the induction motor. The switching strategy presented in this paper, does not generate any alternating common mode voltages in the drive system and hence the electrostatic coupling of the common mode voltage, which results in the bearing currents and the leakage currents, is avoided. The proposed scheme is devoid of neutral point voltage fluctuations and does not require neutral point clamping diodes, when compared to the common mode elimination scheme based on the conventional three-level inverter topology. Also, the present scheme uses a single dc-link with half the voltage compared to the conventional three-level inverter based scheme.
TL;DR: In this article, a complete analytical calculation of the power semiconductor losses for both converter types is presented, most parts are already known, some parts are developed here, as far as the authors know.
Abstract: A crucial criterion for the dimensioning of three phase PWM converters is the cooling of the power semiconductors and thus determination of power dissipation in the semiconductors at certain operating points and its maximum. Methods for the calculation and simulation of semiconductor losses in the most common voltage source and current source three phase PWM converters are well known. Here a complete analytical calculation of the power semiconductor losses for both converter types is presented, most parts are already known, some parts are developed here, as far as the authors know. Conduction losses as well as switching losses are included in the calculation using a simplified model, based on power semiconductor data sheet information. This approach should benefit the prediction and further investigations of the performance of power semiconductor losses for both kinds of converters. Results of the calculation are shown. Dependencies of the semiconductor power losses on the type of converter, the operating point and the pulse width modulation are pointed out, showing the general behaviour of power losses for both converter types.
TL;DR: In this paper, a comparative study of synchronous reference frame PLL algorithms for single-phase systems is presented, including operation of the PLL structures under distorted utility conditions, to allow a performance evaluation of the algorithms.
Abstract: Phase angle, frequency and amplitude of the utility voltage vector are basic information for an increasing number of grid-connected power conditioning equipments, such as PWM rectifiers, uninterruptible power systems (UPS), voltage sag compensators and the emerging distributed generation systems. For these applications, accurate tracking of the utility voltage vector is essential to ensure correct operation of the control system. This paper presents a comparative study of synchronous reference frame PLL algorithms for single-phase systems. Simulation and experimental results, including operation of the PLL structures under distorted utility conditions are presented, to allow a performance evaluation of the PLL algorithms.
TL;DR: This paper shows how to integrate fault compensation strategies into two different types of configurations of induction motor drive systems by reconfiguring the power converter topology with the help of isolating and connecting devices.
Abstract: This paper shows how to integrate fault compensation strategies into two different types of configurations of induction motor drive systems. The proposed strategies provide compensation for open-circuit and short-circuit failures occurring in the converter power devices. The fault compensation is achieved by reconfiguring the power converter topology with the help of isolating and connecting devices. These devices are used to redefine the post-fault converter topology. This allows for continuous free operation of the drive after isolation of the faulty power switches in the converter. Experimental results demonstrate the validity of the proposed systems.
TL;DR: A comparative study of synchronous reference frame PLL algorithms for single-phase systems and results, including operation of the PLL structures under distorted utility conditions are presented, to allow a performance evaluation of thePLL algorithms.
Abstract: Phase angle, frequency and amplitude of the utility voltage vector are basic information for an increasing number of grid-connected power conditioning equipments, such as PWM rectifiers, uninterruptible power systems (UPS), voltage sag compensators and the emerging distributed generation systems. For these applications, accurate tracking of the utility voltage vector is essential to ensure correct operation of the control system. This paper presents a comparative study of synchronous reference frame PLL algorithms for single-phase systems. Simulation and experimental results, including operation of the PLL structures under distorted utility conditions are presented, to allow a performance evaluation of the PLL algorithms.
TL;DR: In this paper, a voltage modulation method based on a triangular carrier wave for the three-phase four-leg voltage source converter is described, which can produce three output voltages independently with one additional leg.
Abstract: In this paper a voltage modulation method based on a triangular carrier wave for the three-phase four-leg voltage source converter is described. The four-leg converter can produce three output voltages independently with one additional leg. The proposed modulation method for the four-leg converter can be implemented with a single carrier by a simple but useful "offset voltage" concept. The method is equivalent to the so called three-dimensional space vector PWM method, but its implementation is much easier. The maximum magnitude of the balanced three-phase voltage and the maximum magnitude of zero sequence voltage, which can be synthesized simultaneously, are derived. The feasibility of the proposed modulation technique is verified by computer simulation and experimental results. These results show that a proposed carrier-based pulsewidth modulation (PWM) technique can be easily implemented without conventional computational burden.
TL;DR: Based upon results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended.
Abstract: The objective of this paper is to investigate the optimal common-mode voltage reduction pulsewidth modulation (PWM) technique when dead-time effect is taken into account. The effect of dead time on common-mode voltage for inverter control and the associated solution are discussed. Based upon these results, an optimal common-mode voltage reduction PWM technique, which requires no extra voltage/current sensors and compensation mechanism while not being affected by the dead time, is recommended. The common-mode voltage can be reduced to one-third for the inverter with diode front end, which is widely used in industry. Intensive measured results are presented to fully support the claims.
TL;DR: In this paper, a dual-mode digitally controlled buck converter IC for cellular phone applications is described, which employs internal power management to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology.
Abstract: This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm/sup 2/ in 0.25-/spl mu/m CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 /spl mu/A.
TL;DR: In this article, a step-by-step design procedure, taking into account all these elements, is proposed and validated through the tests on an experimental prototype, and the reported results are particularly relevant to evaluate the influence on the grid current harmonic content of the grid sensor position and of the use of analog filters in the feedback signals.
Abstract: The voltage source active rectifier is one of the most interesting solutions to interfacing dc power systems to the grid. Many elements are responsible for the overall system behaviour, such as value of the passive elements, sensors position, analog/digital filters and ac current/dc voltage controllers. In this paper a step-by-step design procedure, taking into account all these elements, is proposed and validated through the tests on an experimental prototype. The reported results are particularly relevant to evaluate the influence on the grid current harmonic content of the grid sensor position and of the use of analog filters in the feedback signals.
TL;DR: In this article, a multiphase space vector pulse width modulation (SVPWM) analysis based on multiple d-q spaces concept is proposed to synthesize an arbitrary nonsinusoidal phase voltage.
Abstract: Multiphase motors are usually designed to have the concentrated winding and nonsinusoidal air gap flux density distribution in order to maximize the torque per ampere. This means that the phase voltage of a multiphase motor has the nonsinusoidal waveform. Accordingly, the conventional analysis on a multiphase space vector pulse width modulation (SVPWM), which is confined to a sinusoidal phase voltage, should be extended to a nonsinusoidal phase voltage. In this paper, based on a multiple d-q spaces concept a novel analysis on a multiphase SVPWM to synthesize an arbitrary nonsinusoidal phase voltage is proposed. Through out this paper, a five-phase inverter is used as a practical example. The basic concepts can be easily extended to an n-phase inverter.
TL;DR: Analytical techniques for the determination of the expressions for the modulation signals used in the carrier-based sinusoidal and generalized discontinuous pulse-width modulation schemes for two-level, three-phase voltage source inverters are presented.
Abstract: This paper presents analytical techniques for the determination of the expressions for the modulation signals used in the carrier-based sinusoidal and generalized discontinuous pulse-width modulation schemes for two-level, three-phase voltage source inverters. The proposed modulation schemes are applicable to inverters generating balanced or unbalanced phase voltages. Some results presented in this paper analytically generalize the several expressions for the modulation signals already reported in the literature and new ones are set forth for generating unbalanced three-phase voltages. Confirmatory experimental and simulation results are provided to illustrate the analyses.
TL;DR: In this paper, a small-sized passive EMI filter with a voltage-source pulse-width modulated (PWM) inverter is proposed to eliminate both high-frequency common-mode and normal-mode voltages from the three-phase output voltages of the inverter.
Abstract: This paper deals with integrating a small-sized passive electromagnetic interference (EMI) filter with a voltage-source pulse-width modulated (PWM) inverter. The purpose of the filter is to eliminate both high-frequency common-mode and normal-mode voltages from the three-phase output voltages of the inverter. A laboratory system consisting of a 5-kVA inverter, a 3.7-kW induction motor, and a specially-designed passive EMI filter was constructed to verify the viability and effectiveness of the filter. As a result, both line-to-line and line-to-neutral output voltages look purely sinusoidal as if the inverter were an ideal three-phase variable-voltage, variable-frequency power supply when viewed from the motor terminals. This results in a complete solution to serious EMI issues related to high-frequency common-mode and normal-mode voltages produced by the PWM inverter.
TL;DR: The PWM ac/dc converter controlled by the proposed passivity-based current control scheme with outer loop PI compensation has the features of enhanced robustness under model uncertainties, decoupled current-loop dynamics, guaranteed zero steady-state error, and asymptotic rejection of constant load disturbance.
Abstract: In this paper, we investigate the dc-bus voltage regulation problem for a three-phase boost-type pulsewidth-modulated (PWM) ac/dc converter using passivity-based control theory of Euler-Lagrange (EL) systems. The three-phase PWM ac/dc converters modeled in the a-b-c reference frame are first shown to be EL systems whose EL parameters are explicitly identified. The energy-dissipative properties of this model are fully retained under the d-q-axis transformation. Based on the transformed d-q EL model, passivity-based controllers are then synthesized using the techniques of energy shaping and damping injection. Two possible passivity-based feedback designs are discussed, leading to a feasible dynamic current-loop controller. Motivated from the usual power electronics control schemes and the study of Lee, the internal dc-bus voltage dynamics are regulated via an outer loop proportional plus integral (PI) controller cascaded to the d-axis current loop. Nonlinear PI control results of Desoer and Lin are applied to theoretically validate the proposed outer loop control scheme. The PWM ac/dc converter controlled by the proposed passivity-based current control scheme with outer loop PI compensation has the features of enhanced robustness under model uncertainties, decoupled current-loop dynamics, guaranteed zero steady-state error, and asymptotic rejection of constant load disturbance. Experimental results on a 1.5-kVA PC-based controlled prototype provide verification of these salient features. The experimental responses of a classical linear PI scheme are also included for comparative study.
TL;DR: In this paper, the gate drive requirements for high frequency PWM applications and common shortcomings of existing resonant gate drive techniques are discussed and a new resonant MOSFET gate drive circuit is presented.
Abstract: High frequency pulse-width modulation (PWM) converters generally suffer from excessive gate drive loss. This paper presents a resonant gate drive circuit that features efficient energy recovery at both charging and discharging transitions. Following a brief introduction of metal oxide semiconductor field effect transistor (MOSFET) gate drive loss, this paper discusses the gate drive requirements for high frequency PWM applications and common shortcomings of existing resonant gate drive techniques. To overcome the apparent disparity, a new resonant MOSFET gate drive circuit is then presented. The new circuit produces low gate drive loss, fast switching speed, clamped gate voltages, immunity to false trigger and has no limitation on the duty cycle. Experimental results further verify its functionality.
TL;DR: A new space-vector approach is proposed by which the switching losses can be reduced by 15%-35%, depending on the output load angle, and the output voltage of the proposed scheme turns out to be comparable to the best of the conventional schemes while the input current is more distorted.
Abstract: This paper presents a method for evaluating different modulation schemes employed with three-phase to three-phase matrix converters. The evaluation method addresses three important modulator characteristics: the output waveform quality, the input waveform quality and the switching losses associated with the modulation schemes. The method is used to evaluate four different modulation strategies, all based on the direct space-vector modulation approach. Further, regarding the switching losses, the paper proposes a new space-vector approach by which the switching losses can be reduced by 15%-35%, depending on the output load angle. This new modulation approach is applicable whenever the output voltage reference is below half the input voltage and the output voltage quality is then superior to that of the conventional space vector modulation scheme. The functionality of the new modulation scheme is validated by both simulations and experimental results and compared to waveforms obtained by using exiting space vector modulation schemes. The output voltage of the proposed scheme turns out to be comparable to the best of the conventional schemes while the input current is more distorted.
TL;DR: In this article, a family of soft-switched, full-bridge (FB) PWM converters that feature zero-voltage switching (ZVS) of all bridge switches over a wide range of input voltage and output load with minimal duty cycle loss and circulating current is described.
Abstract: A family of soft-switched, full-bridge (FB) pulse-width-modulated (PWM) converters that feature zero-voltage-switching (ZVS) of all bridge switches over a wide range of input voltage and output load with minimal duty cycle loss and circulating current is described. The ZVS of primary switches is achieved by employing two magnetic components whose volt-second products change in the opposite directions with a change of phase shift between the two bridge legs. One magnetic component is a transformer while the other magnetic component is either a coupled inductor or a single-winding inductor. The transformer is used to provide isolated output(s), whereas the inductor is used to store energy for ZVS.
TL;DR: A dual-mode digitally controlled buck converter IC for cellular phone applications employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology.
Abstract: This paper describes a dual-mode digitally controlled buck converter IC for cellular phone applications. An architecture employing internal power management is introduced to ensure voltage compatibility between a single-cell lithium-ion battery voltage and a low-voltage integrated circuit technology. Special purpose analog and digital interface elements are developed. These include a ring-oscillator-based A/D converter (ring-ADC), which is nearly entirely synthesizable, is robust against switching noise, and has flexible resolution control, and a very low power ring-oscillator-multiplexer-based digital pulse-width modulation (PWM) generation module (ring-MUX DPWM). The chip, which includes an output power stage rated for 400 mA, occupies an active area 2 mm 2 in 0.25-μm CMOS. Very high efficiencies are achieved over a load range of 0.1-400 mA. Measured quiescent current in PFM mode is 4 μA.
TL;DR: In this article, a study for modeling harmonic currents injected by three-level pulsewidth-modulated (PWM) converters of the high-speed railway traction drive in steady-state motoring mode is presented.
Abstract: This paper presents a study for modeling harmonic currents injected by three-level pulse-width-modulated (PWM) converters of the high-speed railway traction drive in steady-state motoring mode. An analytical solution for converter harmonics based on the double Fourier series theory is described. The time-domain simulation results obtained by the use of PSpice are then compared with those obtained by the proposed model. It is shown that the harmonic currents determined according to the proposed model agree well with those results obtained by using the time-domain simulation tool.
TL;DR: Small-signal frequency- and Laplace-domain models for the different types of uniformly-sampled pulse-width modulators are derived theoretically and the results obtained are verified by means of experimental data retrieved from a test setup.
Abstract: As the performance of digital signal processors has increased rapidly during the last decade, there is a growing interest to replace the analog controllers in low power switching converters by more complicated and flexible digital control algorithms. Compared to high power converters, the control loop bandwidths for converters in the lower power range are generally much higher. Because of this, the dynamic properties of the uniformly-sampled pulse-width modulators used in low power applications become an important restriction for the maximum achievable bandwidth of control loops. After the discussion of the most commonly used uniformly-sampled pulse-width modulators, small-signal frequency- and Laplace-domain models for the different types of uniformly-sampled pulse-width modulators are derived theoretically. The results obtained are verified by means of experimental data retrieved from a test setup.
TL;DR: In this paper, the LED brightness control system for a wide range of luminance control includes a brightness control module that provides a pulse width modulation (PWM) control signal and a peak current control signal.
Abstract: The LED brightness control system for a wide range of luminance control includes a brightness control module that provides a pulse width modulation (PWM) control signal and a peak current control signal. A pulse width modulation (PWM) converter circuit receives the PWM control signal and converts it to a PWM signal. A multiplier receives the PWM signal and the peak current control signal from the brightness control module and multiplies the same to provide a light emitting diode (LED) current control signal with a variable “on” time as well as variable “on” level. A voltage-controlled current source utilizes the LED current control signal and an LED current feedback signal for providing an LED current. An LED illuminator array receives the LED current. A current sensing element connected to the LED illuminator array for providing an LED current feedback signal representing LED peak current. The voltage-controlled current source controls a drive voltage to the LED illuminator array at a commanded level.
TL;DR: A control circuit for a lighting system allows analog control over a first range of illumination intensities in which the intensity of the illumination source varies in proportion to the voltage level of the control signal as discussed by the authors.
Abstract: A control circuit for a lighting system allows analog control over a first range of illumination intensities in which the intensity of the illumination source varies in proportion to the voltage level of the control signal. The circuit provides for improved dimming and color mixing capability by allowing pulse width or frequency modulation control in addition to analog control over a second range of illumination intensities.
TL;DR: A new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control, which has one more degree of freedom for the control than the inverter with the conventional control scheme.
Abstract: This paper presents a new control scheme for a Class DE inverter, that is, frequency modulation/pulsewidth modulation (FM/PWM) control. Further, the FM/PWM controlled Class DE inverter is analyzed and we clarify performance characteristics. Since the FM/PWM controlled inverter has two control parameters, namely, the switching frequency and the switch-on duty ratio, it has one more degree of freedom for the control than the inverter with the conventional control scheme. The increased degree of freedom is used to minimize the switching losses. Therefore, it is possible to control the output power with high power-conversion efficiency for wide-range control. Carrying out the circuit experiments, we confirm that the experimental results agree well with the theoretical predictions quantitatively. For example, the proposed controlled inverter can control the output voltage from 56% to 191% of the optimum one, which is designed for 1.8 W at 1.0 MHz, with maintaining over 90% power-conversion efficiency.
TL;DR: In this paper, a method for producing a controlled output voltage for a switching power converter under current control using pulse width modulation was presented, where a predictive digital current-mode controller and a digital pulse width modulator were used.
Abstract: The present invention provides a method for producing a controlled output voltage for a switching power converter under current control using pulse width modulation, the switching power converter including a predictive digital current-mode controller and a digital pulse width modulator. The current control results in an unstable output voltage, and the pulse width modulation method is selected to eliminate the instability of the output voltage.
TL;DR: In this article, a PWM controller for a primary-side controlled power converter is presented, where a voltage-waveform detector produces a voltage feedback signal and a discharge-time signal, and an integrator generates a current-feedback signal by integrating the current waveform signal with the discharge time signal.
Abstract: A close-loop PWM controller for a primary-side controlled power converter is provided. A voltage-waveform detector produces a voltage-feedback signal and a discharge-time signal. A current-waveform detector generates a current-waveform signal by measuring a primary-side switching current. An integrator generates a current-feedback signal by integrating the current-waveform signal with the discharge-time signal. A time constant of the integrator is correlated with a switching period of the switching signal, therefore the current-feedback signal is proportional to the output current of the power converter. The close-loop PWM controller further including a voltage-loop error amplifier and a current-loop error amplifier. A PWM circuit and comparators control the pulse width of the switching signal in response to the outputs of the voltage-loop error amplifier and the current-loop error amplifier. The output voltage and the maximum output current of the power converter are therefore regulated.
TL;DR: In this article, the authors demonstrate the applications of the newly developed common-mode voltage reduction pulsewidth-modulation (PWM) technique, which restricts the commonmode voltage to one-third of DC-link voltage, to vector-controlled induction motor drives.
Abstract: The main theme of this paper is to demonstrate the applications of the newly developed common-mode voltage reduction pulsewidth-modulation (PWM) technique, which restricts the common-mode voltage to one-third of DC-link voltage, to vector-controlled induction motor drives. As compared to previous common-mode voltage reduction techniques, the presented technique can be applied to the inverter with diode front end and has no adverse effect on the linear modulation range. Therefore, vector-controlled drives using the developed technique for inverter control have a wide speed range. Moreover, the effects of the common-mode voltage reduction PWM technique on speed response for vector-controlled induction motor drives will be fully investigated in this paper. It will be demonstrated by intensive experimental results that speed performance does not deteriorate significantly within the rated speed range.
TL;DR: In this article, a duty-cycle-shifted pulsewidth modulated (DCS PWM) control scheme was proposed for half-bridge isolated dc-dc converters to achieve zero-voltage switching (ZVS) operation for one of the two switches without causing asymmetric penalties in the asymmetric control and without adding additional components.
Abstract: Asymmetric control scheme is an approach to achieve zero-voltage switching (ZVS) for half-bridge isolated dc-dc converters. However, it is not suited for wide range of input voltage due to the uneven voltage and current components stresses. This paper presents a novel "duty-cycle-shifted pulse-width modulated" (DCS PWM) control scheme for half-bridge isolated dc-dc converters to achieve ZVS operation for one of the two switches without causing the asymmetric penalties in the asymmetric control and without adding additional components. Based on the DCS PWM control scheme, an active-clamp branch comprising an auxiliary switch and a diode is added across the isolation transformer primary winding in the half-bridge converter to achieve ZVS for the other main switch by utilizing energy stored in the transformer leakage inductance. Moreover, the auxiliary switch also operates at ZVS and zero-current switching (ZCS) conditions. Furthermore, during the off-time period, the ringing resulted from the oscillation between the transformer leakage inductance and the junction capacitance of two switches is eliminated owing to the active-clamp branch and DCS PWM control scheme. Hence, switching losses and leakage-inductance-related losses are significantly reduced, which provides the converter with the potential to operate at higher efficiencies and higher switching frequencies. The principle of operation and key features of the proposed DCS PWM control scheme and two ZVS half-bridge topologies are illustrated and experimentally verified.