TL;DR: In this paper, a dual d-c level set scheme is proposed to minimize selected harmonics of the alternating voltage and the higher level is varied as a function of the amplitude command signal thereby to vary the amplitude of the fundamental voltage component, and means are provided for smoothly transitioning to a square wave mode of operation as the amplitude signal approaches 1.0 per unit.
Abstract: Alternating voltage for energizing an adjustable speed a-c motor is derived from unipolarity input voltage by means of electric power inverting apparatus comprising at least one pair of alternately conducting controllable electric valves. The conducting states of these valves are periodically switched by control means responsive to frequency and amplitude command signals, whereby the frequency and the amplitude of the fundamental component of the alternating voltage are varied as functions of the respective command signals. The control means includes means for implementing a triangle interception mode of pulse width modulation (PWM) of the alternating voltage so long as the amplitude command signal does not exceed a predetermined reference value (which is less than 1.0 per unit) and the speed of the motor does not exceed a predetermined reference speed, and the control means additionally includes means for implementing a "transition" PWM mode of operation whenever the amplitude command signal exceeds its reference value or the motor speed exceeds said reference speed. As disclosed herein the transition PWM mode implementing means is a dual d-c level set scheme in which the lower level is varied as a function of the higher level so as to minimize selected harmonics of the alternating voltage and the higher level is varied as a function of the amplitude command signal thereby to vary the amplitude of the fundamental voltage component, and means is provided for smoothly transitioning to a square wave mode of operation as the amplitude command signal approaches 1.0 per unit.
TL;DR: In this article, the authors proposed a method for storing a pulse width modulated wave of predetermined pattern for any discrete value of successive desired output voltage levels, where the notches characterizing a particular pattern are stored in the form of a digital representation one level along several possible levels defining subdivisions of a given time interval which is itself a submultiple of the total duration of the stored quandrant.
Abstract: Pulse width modulation is produced by digital means. Pulse width modulated waves are stored digitally in a memory and retrieved under control of a voltage signal in order to generate a pulse width modulated wave of predetermined pattern for any discrete value of successive desired output voltage levels. Optimal waveforms are selected and stored which extend only for one quadrant but an alteration of the addressing code based on symmetry yields the mirror image of the stored quadrant while sign modification provides symmetry about the abscissa axis. Also, only a single phase is stored and phase shifting by code alteration of the coded information provides the other phases after retrieval. The notches characterizing a particular pattern are stored in the form of a digital representation one level along several possible levels defining subdivisions of a given time interval which is itself a submultiple of the total duration of the stored quandrant. A comparator responsive to a series of ramp signals detects in real time the stored levels thereby to effect switching from one state to the other and define one edge of a notch. The notches may extend over several of the ramp signals. The invention provides, with substantially the same hardware, for a fixed pattern mode of operation in the normal frequency range, and for a free running triangulation mode for the lower frequency range. The invention applies to the field of induction motor drives with adjustable speed.
TL;DR: In this paper, a switching regulator electronic power supply for 115 volt A.C. operation rectifies and filters to provide approximately 170 volts of unregulated D.C to the primary winding of a power conversion transformer.
Abstract: A switching regulator electronic power supply for 115 volt A.C. operation rectifies and filters to provide approximately 170 volts of unregulated D.C. to the primary winding of a power conversion transformer. In series with the primary winding is a transistor power switch controlled by a pulse width modulator whose ON-time is determined by the rectified D.C. voltage level, and whose OFF-time is controlled by an output voltage sensor and a current limiter that provide duty cycles that assure a constant D.C. voltage level from the rectified and filtered output of the power supply.
TL;DR: In this article, the dc-bias current and the peak and width of the current pulse were adjusted to achieve bit rates of 3-4 Gbit/s by using simple analytical expressions.
Abstract: Investigation of the rate equations of a semiconductor laser suggests that bit rates of 3-4 Gbit/s can be achieved. Delay, ringing transients, and charge-storage effects can be removed by adjusting the dc-bias current and the peak and width of the current pulse to values prescribed by simple analytical expressions. Also, simple approximate formulas for the light pulse maximum, width, delay, and integrated values are given.
TL;DR: In this paper, a D.C. to DC converter with a choke with a primary winding and a start winding is described, where a portion of the input power is fed through a section of the start winding to the base of a switching transistor connected in series with the primary winding.
Abstract: A D.C. to D.C. converter including a start circuit having a choke with a primary winding and a start winding. A portion of the input power is fed through a section of the start winding to the base of a switching transistor connected in series with the primary winding. The transistor is operated as a blocking oscillator by the start circuit and a voltage is induced across a secondary winding of the choke. The secondary voltage is rectified and fed to the control input of a pulse width modulator. In response to a predetermined level of the secondary voltage, the output of the pulse width modulator is coupled to the base of the transistor and the start circuit disabled. Current overload and transient voltage protection circuits are also included.
TL;DR: In this paper, a system for transmitting data from remote sensors to a digital processing system is described, where the analog sensor output is converted to pulse width signals at the sensor location and converted from pulse width to digital data at the digital processor.
Abstract: A system for transmitting data from remote sensors to a digital processing system is disclosed herein. The analog sensor output is converted to pulse width signals at the sensor location and converted from pulse width to digital data at the digital processor. Delay circuits at each sensor location permits the use of a single interrogation signal to simultaneously interrogate each sensor. The generation of the pulse width signal is delayed at each sensor location so that the pulse width signals from the sensors are serially received at the pulse width to digital converter. Only a single data transmission line is required for transmitting the interrogation signal and the pulse width signals back and forth between the digital processor and the sensor locations. In one embodiment, energy storage means are provided at each sensor location which provides sufficient electrical power for the operation of the sensor and the analog to pulse width converter. This energy storage means is charged by the interrogation signal transmitted along the single data transmission line eliminating the need for providing individual power leads at each sensor location.
TL;DR: In this article, an electronic speed controller for a radio controlled model has conversion circuitry to derive a dc signal having a level proportional to the information pulse width of the radio control signal, but which is insensitive to changes in the frame rate thereof.
Abstract: An electronic speed controller for a radio controlled model has conversion circuitry to derive a dc signal having a level that is proportional to the information pulse width of the radio control signal, but which is insensitive to changes in the frame rate thereof. This dc signal level is compared with a reference triangular wave to obtain a digital control signal having a duty cycle proportional to the information pulse width. This signal is used to gate battery voltage to the motor, thereby to control its speed. In one embodiment, the battery voltage is supplied to the motor via a power transistor. A switching regulator connected between the motor battery and the base of the power transistor provides sufficient base current to drive that transistor into saturation regardless of the motor battery voltage, and with the base current responsive to the Vbe of that transistor. The regulator is gated on by the digital control signal. In another embodiment, battery voltage is supplied to the motor via a power transistor bridge. One or the other pair of bridge transistors is turned on by the digital control signal, which in this embodiment is a three-level signal having a polarity dependent on whether the information pulse width is above or below a certain mid-range value. The gating circuitry provides constant base drive current to the pair of bridge transistors that is turned on.
TL;DR: In this article, a switching regulator includes a digital feedback control circuit to regulate the output voltage and the accumulated count is continuously compared with a reference count, which determines the duty cycle of periodic conduction.
Abstract: A switching regulator includes a digital feedback control circuit to regulate the output voltage. The frequency output of a voltage controlled oscillator responsive to the output voltage is periodically counted. The accumulating count is continuously compared with a reference count. The elapsed time for this count to accumulate to a value equaling the reference count determines the duty cycle of periodic conduction through the switching device of the switching regulator.
TL;DR: In this paper, a system for controlling power applied to a gas discharge lamp by an AC source is presented, where the power dissipated in the lamp during a half cycle is sensed by a measuring circuit.
Abstract: A system for controlling power applied to a gas discharge lamp by an AC source, wherein the power dissipated in the lamp during a half cycle is sensed by a measuring circuit. The measuring circuit provides output signals proportional to the current through and voltage across the lamp during its conduction. The measuring circuit output signals are multiplied and the difference between the resultant multiplier signal and a reference signal is time integrated and fed to a pulse width modulator. The pulse width modulator provides a pulse to a pulse transformer to trigger an SCR in series with the lamp at some point in the next half cycle, the point at which the SCR is triggered being determined by the power dissipated in the lamp in the previous half cycle. In another embodiment the SCR is replaced by a transistor and the pulse width modulator shuts off the transistor after the lamp has dissipated the desired amount of power in a given half cycle.
TL;DR: In this paper, a complex pulse repetition frequency generator for producing a pulse repeion frequency (PRF) signal having programmable stagger intervals is presented, which consists of a clock for selecting one of a series of standard clock pulses which are used to increment a counter.
Abstract: A complex pulse repetition frequency generator for producing a pulse repeion frequency (PRF) signal having programmable stagger intervals. The device consists of a clock for selecting one of a series of standard clock pulses which are used to increment a counter. A comparator compares the accumlated clock pulses with a stagger data output signal produced by a data memory source. When the outputs are equal, the comparator produces a PRF output pulse. Two data memory bands are provided; a random access memory in which stagger data can be programmed by a series of switches, and a preprogrammed read-only memory. Address counters are used with each memory unit and provide capability for addressing selected memory locations from the data memory sources. A pulse width generator allows the operator to vary the pulse width and utilizes an injection lock oscillator to prevent jitter whenever a standard clock pulse is used which is not an even multiple of a hundred nanoseconds.
TL;DR: An adjustable speed AC electric motor drive has a static inverter energized from a unidirectional power source through a semiconductor series chopper, which eliminates a filter between chopper and inverter and controls the fundamental inverter output frequency as a function of an analog speed reference signal and also pulse width as discussed by the authors.
Abstract: An adjustable speed AC electric motor drive has a static inverter energized from a unidirectional power source through a semiconductor series chopper and eliminates a filter between chopper and inverter and controls the fundamental inverter output frequency as a function of an analog speed reference signal and also pulse width modulates the series chopper at a constant frequency as a function of the speed reference signal and synchronizes the series chopper to the fundamental inverter freqency to provide variable voltage and variable frequency power to the motor. The drive has a shunt chopper at the output of the series chopper and switches it to the opposite conductive state from the series chopper so that it coacts with the feedback diodes to form substantially continuous, low impedance, bidirectional free-wheeling paths for motor current and provides constant harmonic content current to the motor with reduced ripple.
TL;DR: In this paper, a two-stage, four-way valve has fluid input and output connections, and passes a fluid under controlled pressure to an actuator to operate any component, such operation is sensed and, after comparison with a reference signal, a control signal regulates the duty cycle of a PWM circuit.
Abstract: A two-stage, four-way valve has fluid input and output connections, and passes a fluid under controlled pressure to an actuator to operate any component. Such operation is sensed and, after comparison with a reference signal, a control signal regulates the duty cycle of a pulse-width modulation (PWM) circuit. The output square-wave signal from the PWM circuit regulates a solenoid incorporated in the valve, to modify its operation and regulate the pressure of the controlled fluid. The valve has a spool which effectively integrates the PWM signal and provides a type 1 servo system when connected in a closed loop system.
TL;DR: In this article, a portable, battery-operated variable pulse width, variable pulse rate oscillator is coupled through a variable amplitude current amplifying device to a set of electrodes adapted to be positioned upon the skin of a patient in proximity to a pain exhibiting area.
Abstract: Transcutaneous nerve stimulating apparatus wherein a portable, battery-operated variable pulse width, variable pulse rate oscillator is coupled through a variable amplitude current amplifying device to a set of electrodes adapted to be positioned upon the skin of a patient in proximity to a pain exhibiting area. The electrical signals or impulses are transmitted through the skin to the underlying nerves and serve to block the pain.
TL;DR: A battery backup system for an AC energized DC supply has an AC line monitor for producing a pulse signal having a pulse width dependent on rise time of AC signal and a frequency dependent on zero line crossings of the AC signal.
Abstract: A battery backup system for an AC energized DC supply has an AC line monitor for producing a pulse signal having a pulse width dependent on rise time of the AC signal and a frequency dependent on zero line crossings of the AC signal. The pulse signals are checked for frequency and pulse width by being used to control the charging time of a timing capacitor for a timer and to be compared with the pulse width of a predetermined reference pulse, respectively. The occurrence of a defect in the pulse signals stemming from either pulse testing criteria is effective to trigger an SCR circuit into conduction to connect a backup battery to the load devices to replace the DC power formerly being supplied by the AC line. After restoration of the AC power, the backup battery is removed following a fixed time delay to allow the AC powered DC supply to stabilize. A battery charging power supply is connected to the backup battery and is automatically switched between a battery "float-rate" and a "high-rate" charging operation following an AC outage and returned when the charging current indicates that the backup battery is fully charged.
TL;DR: In this article, a method of driving a liquid crystal display matrix, in which digit drive signals are applied to digit electrodes and segment drive signals were applied to segment electrodes, was proposed.
Abstract: A method of driving a liquid crystal display matrix, in which digit drive signals are applied to digit electrodes and segment drive signals are applied to segment electrodes. Each of the digit drive signals has first pulse components of a first pulse width varying at a plurality of voltage potentials in a first predetermined sequence during each cycle, and a second pulse component of a second pulse width having a selected one of the voltage potentials during each half cycle. Each of the segment drive signals has first pulse components of the first pulse width varying at at least two of the voltage potentials in a second predetermined sequence, and a second pulse component of the second pulse width having a voltage potential equal to that of the second pulse component of the digit drive signal. The second pulse components of the digit and segment drive signals are in synchronism with each other, whereby the potential difference across the electrodes will be zero to reduce the root-mean-square voltage applied to the liquid crystal display matrix. The duty cycles of the digit drive signals and the segment drive signals are varied in dependence on an ambient temperature.
TL;DR: In this article, a direct current voltage power supply in which spaced pulses of current are made to flow through the primary winding of a power transformer is described. But this is not the case in this paper.
Abstract: A direct current voltage power supply in which spaced pulses of current are made to flow through the primary winding of a power transformer. The anode-cathode path of an SCR device is connected from a point on a secondary winding to an output capacitor. A pulse width modulation circuit and a base drive circuit are connected between the output capacitor and the gate electrode of the SCR device so as to apply a pulse to the gate electrode that enables conduction between the source and drain electrodes whenever the voltage across the output capacitor drops below a given reference value.
TL;DR: In this paper, a horizontal AFC circuit consisting of a phase detector circuit, a filter circuit for filtering the output of the phase detector, a horizontal oscillator circuit, and a wave shaping circuit operating upon being supplied with the output pulse of the horizontal deflection circuit to wave shape this output pulse, means for supplying a control pulse of a pulse width corresponding to a vertical blanking period.
Abstract: A horizontal AFC circuit comprising a phase detector circuit supplied with a horizontal synchronizing signal separated from a television video signal and with a comparison signal and carrying out phase comparison, a filter circuit for filtering the output of the phase detector circuit, a horizontal oscillator circuit supplied with the output of the filter circuit and oscillating with an oscillation frequency controlled thereby, a horizontal deflection circuit for forming the output signal of the horizontal oscillator circuit into a horizontal deflection pulse, a wave shaping circuit operating upon being supplied with the output pulse of the horizontal deflection circuit to wave shape this output pulse and to supply the resulting output signal thereof as said comparison signal to the phase detector circuit, means for supplying a control pulse of a pulse width corresponding to a vertical blanking period of the television video signal, and loop gain control means supplied with the control pulse and operating to cause the loop gain of the horizontal AFC circuit to be relatively large in the pulse width duration and to cause the loop gain to be relatively small in a period other than said pulse width duration.
TL;DR: In this article, the use of pulse width-modulated amplifiers for dc servo systems, in order to reduce the power dissipation in the output stage is proposed, where the amplifier transistors can be switched in different sequences, and the amplifier will operate accordingly in three possible modes, namely the bipolar, the unipolar and the limited unipolar modes.
Abstract: The use of pulse width-modulated amplifiers for dc servo systems, in order to reduce the power dissipation in the output stage is proposed. The amplifier transistors can be switched in different sequences, and the amplifier will operate accordingly in three possible modes, namely the bipolar, the unipolar, and the limited unipolar modes. The principle of operation and the mathematical model for each case are described along with the special features of this amplifier which include the power dissipation in the motor and the selection of the switching frequency.
TL;DR: In this paper, a sync regenerator is provided which regenerates synchronizing information signals having a varying amplitude and width by comparing the sync signals in a comparator circuit to which a source of reference potential is applied.
Abstract: A sync regenerator is provided which regenerates synchronizing information signals having a varying amplitude and width by comparing the sync signals in a comparator circuit to which a source of reference potential is applied. The comparator output signal of fixed amplitude is pulse width detected and the value of the detector output voltage is coupled by a feedback circuit to the reference potential source to vary the reference potential so as to maintain the width of the comparator output signal constant. The regenerated sync output signal is of constant amplitude and constant width.
TL;DR: In this article, the authors proposed a protection circuit for a pulse width modulated signal amplifier, which includes a signal input circuit, a carrier signal generator, a signal width modulator for receiving both the output signals of the signal inputs and the carrier signals, an amplifier for receiving the pulse width modulation signal and for amplifying it to drive a load through a low pass filter, a detecting circuit for detecting whether the modulation signal is present or not, or detecting DC voltage of undesirable duration.
Abstract: A protective circuit for a pulse width modulated signal amplifier includes a signal input circuit, a carrier signal generator, a pulse width modulator for receiving both the output signals of the signal input circuit and the carrier signal generator and for producing a pulse width modulated signal, an amplifier for receiving the pulse width modulated signal and for amplifying it to drive a load through a low pass filter, a detecting circuit for detecting whether the pulse width modulated signal is present or not, or detecting DC voltage of undesirable duration produced at the output of the amplifier and for producing a control signal, and a protective circuit activated by the control signal for cutting off the operation of the amplifier.
TL;DR: In this paper, a pulse peak sample and hold (PPSH) circuit is proposed. But the PSSH circuit is independent of PRF and pulse width, and it requires a passive input integrator to develop the time of a sample gate.
Abstract: A pulse peak sample and hold circuit includes a passive input integrator to develop the time of a sample gate. A sensitive comparator develops the gate pulse. A FET and storage capacitor "holds" the actual input amplitude. The circuit is independent of PRF and pulse width.
TL;DR: In this paper, the temperature controller senses the temperature unbalance and converts s into a DC voltage which is compared with an oscillator by a pulse width modulator, which is used to control the duty cycle of a heater.
Abstract: The temperature controller senses the temperature unbalance and converts s into a DC voltage which is compared with an oscillator by a pulse width modulator. The output of pulse width modulator controls the duty cycle of a heater.
TL;DR: In this article, a generalized Fourier transform of harmonic coefficients is used to generate tones corresponding to pulse-like waveshapes, which are then simulated by using harmonic coefficients associated with a pulse wave shape of specified shape.
Abstract: In a digital tone synthesizer, musical tones are created by evaluating a generalized Fourier transform of harmonic coefficients. Tones corresponding to pulse-like waveshapes are simulated by using harmonic coefficient values associated with a pulse waveshape of specified shape. Apparatus is disclosed for producing sets of such harmonic coefficient values wherein each particular set is associated with a selected value of a pulse width parameter. Pulse width modulation tonal effects are achieved by changing the value of the pulse width parameter as a function of time. Means are described for including pulse width modulation as a subsystem of digital tone generators.
TL;DR: In this article, the authors determined the dependence of the saturable absorber mode-locked pulse shape upon the relaxation time of the absorber when the laser gain is assumed constant, and found that the modelocked pulse width is a weak function of absorber relaxation time, becoming broader with increasing TA.
Abstract: The dependence of the saturable absorber mode‐locked pulse shape upon the relaxation time of the absorber is determined when the laser gain is assumed constant. The pulses are found to be asymmetric with a slowly rising edge and a more rapidly decaying edge. The mode‐locked pulse width is a weak function of absorber relaxation time TA, becoming broader with increasing TA. Furthermore, the pulses are found to experience a delay in traversing the absorber which lengthens the cavity transit time. The growth of perturbations introduced into the steady state is shown to be bounded, indicating that stable mode‐locked operation is possible even in cases where TA is comparable to or greater than the width of the steady‐state pulse.
TL;DR: In this article, the authors proposed two optical methods to overcome the limitations of the modulation rate of high-speed direct modulation of semiconductor laser pulses: feedback of light from a laser into itself with a time delay and injection of external radiation into laser modes.
Abstract: In high speed direct modulation of semiconductor lasers, serious drawbacks arise from relaxation oscillation in the light output. Several possible schemes have been examined to attain the high speed direct pulse modulation. Electronic band reduction in the detection system improves the waveform distortion caused by the relaxation oscillation at modulation rates up to about 400 Mb/sec in practice. Novel optical methods are proposed to overcome the limit of the modulation rates. Feedback of light from a laser into itself with a time delay (optical feedback) and injection of external radiation into laser modes (optical injection) have been found theoretically and experimentally to be quite effective for reducing the waveform distortion. These methods are expected to extend the direct modulation capability of semiconductor lasers.
TL;DR: In this paper, a method for converting a plural-bit digital signal to a pulse width modulated signal which, thereafter, can be filtered to derive an analog signal level corresponding to the value of the digital signal is presented.
Abstract: A method of and apparatus for converting a plural-bit digital signal to a pulse width modulated signal which, thereafter, can be filtered to derive an analog signal level corresponding to the value of the digital signal. A periodic timing signal is produced and each period thereof is divided into predetermined sections. The value of the digital signal is divided by a factor equal to the number of predetermined sections, and the divided digital signal is converted into a corresponding pulse width modulated signal during each of the timing sections. The pulse width of the pulse width modulated signal in selected ones of the timing sections is selectively increased by a predetermined amount in the event that the divided digital value is not an integral number. In particular, the number of such timimg sections wherein the pulse width of the pulse width modulated signal is increased is equal to the remainder obtained after the value of the digital signal is divided.
TL;DR: A variable speed static controlled induction motor is voltage regulated under variable frequency by controlling the inverters under constant pulse width while maintaining a constant volt-hertz ratio through the feedback voltage control loop as mentioned in this paper.
Abstract: A variable speed static controlled induction motor is voltage regulated under variable frequency by controlling the inverters under constant pulse width while maintaining a constant volt-hertz ratio through the feedback voltage control loop.
TL;DR: In this paper, a single-ended static frequency converter has a pulsewidth controlled transistor with a power transistor feeding a number of secondary windings for galvanically isolated outputs, permitting regulation of the various outputs.
Abstract: A single ended static frequency converter has a pulse-width controlled control transistor. It has a power transistor feeding a number of secondary windings for galvanically isolated outputs, permitting regulation of the various outputs. In addition to the main control transistor, a further pulse-width controlled transistor controlled by the output voltage of any individual output channel is provided with its own auxiliary control circuit. The control of the output voltage may be effected in accordance with the voltage flanks of the voltage from the relevant secondary winding.
TL;DR: A high-efficiency synchronous speed control system for dc motors using the phase-locked technique is presented and some experimental results with a 1/4-hp dc motor are given.
Abstract: A high-efficiency synchronous speed control system for dc motors using the phase-locked technique is presented. The performance is derived in terms of system parameters. Some experimental results with a 1/4-hp dc motor are given.