TL;DR: In this paper, a multiphase output oscillator is organized in a loop, where each oscillator circuit is coupled to its serial successor in the loop, to provide adjustment of the phase of an oscillation signal of the successor oscillator circuits dependent upon a difference between the phases of the oscillation signals in the successor and the phases in the particular oscillator signals.
Abstract: In a multiphase output oscillator a number of serially coupled oscillator circuits is organized in a loop. Each particular oscillator circuit is coupled to its serial successor in the loop, to provide adjustment of the phase of an oscillation signal of the successor oscillator circuit dependent upon a difference between the phase of the oscillation signal in the successor and the phase of an oscillation signal in the particular oscillator circuit. None of the oscillator circuits will oscillate freely: as each oscillator will adjust its successor all the way around the loop. Indirectly, each oscillator circuit thus influences all of the other oscillator circuits and ultimately over itself. The multiphase output oscillator as a whole will oscillate in a collective mode of oscillation wherein all oscillator circuits oscillate at the same frequency. Successive oscillator circuits along the loop will oscillate at respective fractions of the full oscillation period delayed from each other. These fractions will add up to an integer multiple of periods. The frequency of oscillation is substantially independent of the fractions and may be nearly the maximum attainable frequency of the individual oscillator circuits.
TL;DR: In this paper, two triggered-phase oscillators, which are phase-locked to the reference oscillator, are used to supply the start and stop frequencies for phase shifting, which allows for pre-trigger frequency control, and essentially eliminates post trigger frequency drift which usually occurs when an oscillator is first started.
Abstract: Measurement of a time interval between a start and a stop event is made by activating a start oscillator in response to the start event and activating a stop oscillator in response to the stop event. The number of cycles of each respective oscillator signal which occur between the activation of each oscillator and the coincidence of the respective oscillator signal with that of an independent time base is determined. The number of cycles of the time base signal between the coincident points of it and the start and stop oscillator signal is also determined. These numbers, which are always integers, are used along with the values for the time base period and the difference in frequency between the time base oscillator and the start and stop oscillators to calculate the time interval. Resolution of the measurement is dependent on the frequency difference between the time base signal and the start and stop oscillator signals. Two triggered-phase oscillators, which are phase-locked to the reference oscillator, are used to supply the start and stop frequencies. The start trigger and stop signals are used for phase shifting, i.e., restarting of the oscillators rather than starting the oscillators. This allows for pre-trigger frequency control, and essentially eliminates post trigger frequency drift which usually occurs when an oscillator is first started. The coincidence signals are provided by the phase cross-over between the phase locked oscillator and the reference by a digital mixer.
TL;DR: In this paper, a frequency detection circuit detects the frequency of a horizontal sync signal, and generates a mode switching signal corresponding to the detected frequency, and the oscillation modes of the voltage-controlled oscillator are switched in accordance with the frequency detection signal output from the frequency detector circuit.
Abstract: A frequency detection circuit detects the frequency of a horizontal sync signal, and generates a mode switching signal corresponding to the detected frequency. A voltage-controlled oscillator constituting a PLL circuit has a plurality of oscillation modes obtained by dividing a frequency equal to an integer multiple of the frequency of the horizontal sync signal into a plurality of frequency ranges, and oscillates signals in the respective frequency ranges in accordance with control voltages output from a filter. The oscillation modes of the voltage-controlled oscillator are switched in accordance with the mode switching signal output from the frequency detection circuit. In the voltage-controlled oscillator, since the frequency range in each oscillation mode is narrow, the oscillation gain can be suppressed low, and a deterioration in jitter characteristics can be prevented.
TL;DR: In this paper, a phase discriminator is used to compare the output of the reference oscillator with a reduced component of the output from the controlled oscillator stage, in order to stabilize the output.
Abstract: A stabilized oscillator circuit having two controlled oscillator stages with switching means for periodically switching from the output of one oscillator stage to the output of the other oscillator stage. Each of the controlled oscillator stages are stable within predetermined limits for a given period when freerunning and stabilized from a reference oscillator circuit for a terminal part of the time that the other controlled oscillator is effective. Stabilization is effected by a phase discriminator which compares the output of the reference oscillator with a reduced component of the output from the controlled oscillator stage. The arrangement may also employ individual oscillator stages operated at the same operating frequency. This makes it possible to generate an oscillation practically free of subsidiary waves, even over a long period of time. As the term ''''subsidiary waves'''' is herein used, it does not refer to multiples or harmonics of the oscillating frequency, but rather to interfering frequency components which result from the frequency preparation process during stabilization and control setting.
TL;DR: In this paper, the amplitude control circuit receives the output signal of the controllable oscillator and determines the amplitude, and when the amplitude is less than the predefined amplitude, a control signal is sent to the oscillator.
Abstract: Systems for controlling the amplitude of the output signal of a controllable oscillator in a frequency synthesizer are provided. One such system provides a circuit having a controllable oscillator and an amplitude control circuit. The controllable oscillator is configured to generate an output signal having a predefined frequency and a predefined amplitude. The controllable oscillator is also configured with a plurality of operational states that are controlled by the amplitude control circuit. Each operational state of the controllable oscillator defines a particular current bias associated with a distinct amplitude of the output signal of the controllable oscillator. The amplitude control circuit receives the output signal of the controllable oscillator and determines the amplitude. When the amplitude of the output signal of the controllable oscillator is less than the predefined amplitude, the amplitude control circuit provides a control signal to the controllable oscillator. The control signal is configured to change the controllable oscillator to the operational state corresponding to the distinct amplitude that best approximates the predefined amplitude.