Abstract: This tutorial introduces the basics of emerging nonvolatile memory (NVM) technologies including spin-transfer-torque magnetic random access memory (STTMRAM), phase-change random access memory (PCRAM), and resistive random access memory (RRAM). Emerging NVM cell characteristics are summarized, and device-level engineering trends are discussed. Emerging NVM array architectures are introduced, including the onetransistor?one-resistor (1T1R) array and the cross-point array with selectors. Design challenges such as scaling the write current and minimizing the sneak path current in cross-point array are analyzed. Recent progress on megabit-to gigabit-level prototype chip demonstrations is summarized. Finally, the prospective applications of emerging NVM are discussed, ranging from the last-level cache to the storage-class memory in the memory hierarchy. Topics of three-dimensional (3D) integration and radiation-hard NVM are discussed. Novel applications beyond the conventional memory applications are also surveyed, including physical unclonable function for hardware security, reconfigurable routing switch for field-programmable gate array (FPGA), logic-in-memory and nonvolatile cache/register/flip-flop for nonvolatile processor, and synaptic device for neuro-inspired computing.

Abstract: Active research has been done on hybrid organic–inorganic perovskite materials for application to solar cells with high power conversion efficiency. However, this material often shows hysteresis, which is undesirable, shift in the current–voltage curve. The hysteresis may come from formation of defects and their movement in perovskite materials. Here, we utilize the defects in perovskite materials to be used in memory operations. We demonstrate flexible nonvolatile memory devices based on hybrid organic–inorganic perovskite as the resistive switching layer on a plastic substrate. A uniform perovskite layer is formed on a transparent electrode-coated plastic substrate by solvent engineering. Flexible nonvolatile memory based on the perovskite layer shows reproducible and reliable memory characteristics in terms of program/erase operations, data retention, and endurance properties. The memory devices also show good mechanical flexibility. It is suggested that resistive switching is done by migration of vaca...

Abstract: Processing-in-memory (PIM) provides high bandwidth, massive parallelism, and high energy efficiency by implementing computations in main memory, therefore eliminating the overhead of data movement between CPU and memory. While most of the recent work focused on PIM in DRAM memory with 3D die-stacking technology, we propose to leverage the unique features of emerging non-volatile memory (NVM), such as resistance-based storage and current sensing, to enable efficient PIM design in NVM. We propose Pinatubo1, a Processing In Non-volatile memory ArchiTecture for bUlk Bitwise Operations. Instead of integrating complex logic inside the cost-sensitive memory, Pinatubo redesigns the read circuitry so that it can compute the bitwise logic of two or more memory rows very efficiently, and support one-step multi-row operations. The experimental results on data intensive graph processing and database applications show that Pinatubo achieves a ∼500 x speedup, ∼28000x energy saving on bitwise operations, and 1.12× overall speedup, 1.11× overall energy saving over the conventional processor.

Abstract: We successfully implemented a one-transistor (1T) ferroelectric field effect transistor (FeFET) eNVM into a 28nm gate-first super low power (28SLP) CMOS technology platform using two additional structural masks. The electrical baseline properties remain the same for the FeFET integration and the JTAG-controlled 64 kbit memory shows clearly separated states. High temperature retention up to 250 °C is demonstrated and endurance up to 105 cycles was achieved. The FeFET unique properties make it the best candidate for eNVM solutions in sub-2x technologies for low-cost IoT applications.

Abstract: Ferroelectric field effect transistors (FeFETs) based on ferroelectric hafnium oxide (HfO2) thin films show high potential for future embedded nonvolatile memory applications. However, HfO2 films besides their recently discovered ferroelectric behavior are also prone to undesired charge trapping effects. Therefore, the scope of this paper is to verify the possibility of the charge trapping during standard operation of the HfO2-based FeFET memories. The kinetics of the charge trapping and its interplay with the ferroelectric polarization switching are analyzed in detail using the single-pulse $I_{D}$ – $V_{G}$ technique. Furthermore, the impact of the charge trapping on the important memory characteristics such as retention and endurance is investigated.

Abstract: Non-volatile memory (NVM) devices, such as Flash, phase change RAM, spin transfer torque RAM, and resistive RAM, offer several advantages and challenges when compared to conventional memory technologies, such as DRAM and magnetic hard disk drives (HDDs). In this paper, we present a survey of software techniques that have been proposed to exploit the advantages and mitigate the disadvantages of NVMs when used for designing memory systems, and, in particular, secondary storage (e.g., solid state drive) and main memory. We classify these software techniques along several dimensions to highlight their similarities and differences. Given that NVMs are growing in popularity, we believe that this survey will motivate further research in the field of software technology for NVMs.

Abstract: In the advancement of the semiconductor device technology, ZnO could be a prospective alternative than the other metal oxides for its versatility and huge applications in different aspects. In this review, a thorough overview on ZnO for the application of resistive switching memory (RRAM) devices has been conducted. Various efforts that have been made to investigate and modulate the switching characteristics of ZnO-based switching memory devices are discussed. The use of ZnO layer in different structure, the different types of filament formation, and the different types of switching including complementary switching are reported. By considering the huge interest of transparent devices, this review gives the concrete overview of the present status and prospects of transparent RRAM devices based on ZnO. ZnO-based RRAM can be used for flexible memory devices, which is also covered here. Another challenge in ZnO-based RRAM is that the realization of ultra-thin and low power devices. Nevertheless, ZnO not only offers decent memory properties but also has a unique potential to be used as multifunctional nonvolatile memory devices. The impact of electrode materials, metal doping, stack structures, transparency, and flexibility on resistive switching properties and switching parameters of ZnO-based resistive switching memory devices are briefly compared. This review also covers the different nanostructured-based emerging resistive switching memory devices for low power scalable devices. It may give a valuable insight on developing ZnO-based RRAM and also should encourage researchers to overcome the challenges.

Abstract: The limited retention time for single-transistor memory cell based on ferroelectric-gated field-effect-transistor (FeFET) has prevented the commercialization of its nonvolatile memory (NVM) option using the commercially available ferroelectric materials, such as strontium bismuth tantalite (SBT) or lead zirconium titanate (PZT), as the gate dielectric. However, the recent advent of the HfO2-based ferroelectric has demonstrated the strong possibility of meeting the NVM requirement of 10-year retention on aggressively scaled FeFETs. This letter will analyze why the retention for HfO2-based ferroelectric (FE–HfO2) is much longer than its PZT or SBT counterparts, based on the two major retention loss mechanisms: depolarization field and charge trapping.

Abstract: Spin-transfer torque magnetic memory (STT-MRAM) has gained significant research interest due to its nonvolatility and zero standby leakage, near unlimited endurance, excellent integration density, acceptable read and write performance, and compatibility with CMOS process technology. However, several obstacles need to be overcome for STT-MRAM to become the universal memory technology. This paper first reviews the fundamentals of STT-MRAM and discusses key experimental breakthroughs. The state of the art in STT-MRAM is then discussed, beginning with the device design concepts and challenges. The corresponding bit-cell design solutions are also presented, followed by the STT-MRAM cache architectures suitable for on-chip applications.

Abstract: To date antiferroelectrics have not been considered as nonvolatile memory elements because a removal of the external field causes a depolarization, resulting in a loss of the stored information. In comparison to ferroelectrics, antiferroelectrics are known for their enhanced fatigue resistance. Therefore, the main scope of this study is the development of a new memory device concept that would enable the usage of antiferroelectrics as a nonvolatile material with improved wake-up and enhanced endurance properties. Recent studies have shown antiferroelectric behavior in ZrO2, a material that is widely used in semiconductor industry, especially in dynamic random access memories. The basis of the new concept is the antiferroelectric hysteresis combined with the use of different workfunction electrodes that induce an internal bias field. Utilizing this approach, the field cycling endurance is drastically improved. Combining a comprehensive material study and electrical trap spectroscopy together with Landau–Ginzburg–Devonshire formalism, a proof of concept for a novel antiferroelectric random access memory is presented. For implementing a nonvolatile random access memory, the capacitors have to be realized in a 3D integrated version. These 3D integrated ZrO2 capacitors can be used as energy storage devices as well, showing record high energy storage density and very high energy efficiency values.

Abstract: Ferroelectric random access memory (FeRAM) based on conventional ferroelectric perovskites, such as Pb(Zr,Ti)O3 and SrBi2Ta2O9, has encountered bottlenecks on memory density and cost, because those conventional perovskites suffer from various issues mainly including poor complementary metal-oxide-semiconductor (CMOS)-compatibility and limited scalability. Next-generation cost-efficient, high-density FeRAM shall therefore rely on a material revolution. Since the discovery of ferroelectricity in Si:HfO2 thin films in 2011, HfO2-based materials have aroused widespread interest in the field of FeRAM, because they are CMOS-compatible and can exhibit robust ferroelectricity even when the film thickness is scaled down to below 10 nm. A review on this new class of ferroelectric materials is therefore of great interest. In this paper, the most appealing topics about ferroelectric HfO2-based materials including origins of ferroelectricity, advantageous material properties, and current and potential applications in FeRAM, are briefly reviewed.

Abstract: Ferroelectric materials are well-suited for a variety of applications because they can offer a combination of high performance and scaled integration. Examples of note include piezoelectrics to transform between electrical and mechanical energies, capacitors used to store charge, electro-optic devices, and nonvolatile memory storage. Accordingly, they are widely used as sensors, actuators, energy storage, and memory components, ultrasonic devices, and in consumer electronics products. Because these functional properties arise from a noncentrosymmetric crystal structure with spontaneous strain and a permanent electric dipole, the properties depend upon physical and electrical boundary conditions, and consequently, physical dimension. The change in properties with decreasing physical dimension is commonly referred to as a size effect. In thin films, size effects are widely observed, whereas in bulk ceramics, changes in properties from the values of large-grained specimens is most notable in samples with grain sizes below several micrometers. It is important to note that ferroelectricity typically persists to length scales of about 10 nm, but below this point is often absent. Despite the stability of ferroelectricity for dimensions greater than ~10 nm, the dielectric and piezoelectric coefficients of scaled ferroelectrics are suppressed relative to their bulk counterparts, in some cases by changes up to 80%. The loss of extrinsic contributions (domain and phase boundary motion) to the electromechanical response accounts for much of this suppression. In this article, the current understanding of the underlying mechanisms for this behavior in perovskite ferroelectrics is reviewed. We focus on the intrinsic limits of ferroelectric response, the roles of electrical and mechanical boundary conditions, grain size and thickness effects, and extraneous effects related to processing. In many cases, multiple mechanisms combine to produce the observed scaling effects.

Abstract: Physically transient resistive switching devices based on silk protein are successfully demonstrated. The devices can be absolutely dissolved in deionized water or in phosphate-buffered saline in 2 h. At the same time, a reasonable resistance OFF/ON ratio of larger than 10(2) and a retention time of more than 10(4) s are achieved for nonvolatile memory applications.

Abstract: A novel multibit MoS2 photoelectronic nonvolatile memory device is developed by synergistically combining rational device designs and the efficient transfer of large-area MoS2 flakes. The MoS2 photoelectronic memory exhibits excellent memory characteristics, including a large programming/erasing current ratio that exceeds 107 , multilevel data storage of 3 bits (corresponding to eight levels), performance stability over 200 cycles, and stable data retention over 104 s.

Abstract: This paper reviews emerging nonvolatile random access memories (RAM) in recent years. It first benchmarks ferroelectric RAM (FeRAM), phase change RAM (PCRAM), resistive RAM (ReRAM), and spin-torque-transfer magnetic RAM (STT-MRAM), discussing each RAM's features and its applications. Then current status of spintronics developments including not only STT-MRAM but also nonvolatile logic LSI is described, which are particularly suitable for working memory applications.

Abstract: Ferroelectrically driven nonvolatile memory is demonstrated by interfacing 2D semiconductors and ferroelectric thin films, exhibiting superior memory performance comparable to existing thin-film ferroelectric field-effect transistors. An optical memory effect is also observed with large modulation of photoluminescence tuned by the ferroelectric gating, potentially finding applications in optoelectronics and valleytronics.

Abstract: Strategies for efficient charge confinement in nanocrystal floating gates to realize high-performance memory devices have been investigated intensively. However, few studies have reported nanoscale experimental validations of charge confinement in closely packed uniform nanocrystals and related device performance characterization. Furthermore, the system-level integration of the resulting devices with wearable silicon electronics has not yet been realized. We introduce a wearable, fully multiplexed silicon nonvolatile memory array with nanocrystal floating gates. The nanocrystal monolayer is assembled over a large area using the Langmuir-Blodgett method. Efficient particle-level charge confinement is verified with the modified atomic force microscopy technique. Uniform nanocrystal charge traps evidently improve the memory window margin and retention performance. Furthermore, the multiplexing of memory devices in conjunction with the amplification of sensor signals based on ultrathin silicon nanomembrane circuits in stretchable layouts enables wearable healthcare applications such as long-term data storage of monitored heart rates.

Abstract: In order for any non-volatile memory (NVM) to be considered a viable technology, its reliability should be verified at the array level. In particular, properties such as high endurance and at least moderate data retention are considered essential. Phase-change memory (PCM) is one such NVM technology that possesses highly desirable features and has reached an advanced level of maturity through intensive research and development in the past decade. Multilevel-cell (MLC) capability, i.e., storage of two bits per cell or more, is not only desirable as it reduces the effective cost per storage capacity, but a necessary feature for the competitiveness of PCM against the incumbent technologies, namely DRAM and Flash memory. MLC storage in PCM, however, is seriously challenged by phenomena such as cell variability, intrinsic noise, and resistance drift. We present a collection of advanced circuit-level solutions to the above challenges, and demonstrate the viability of MLC PCM at the array level. Notably, we demonstrate reliable storage and moderate data retention of 2 bits/cell PCM, on a 64 k cell array, at elevated temperatures and after 1 million SET/RESET endurance cycles. Under similar operating conditions, we also show feasibility of 3 bits/cell PCM, for the first time ever.

Abstract: Owing to the increasing interest in the nonvolatile memory devices, resistive switching based on hybrid nanocomposite of a 2D material, molybdenum disulphide (MoS2) and polyvinyl alcohol (PVA) is explored in this work. As a proof of concept, we have demonstrated the fabrication of a memory device with the configuration of PET/Ag/MoS2-PVA/Ag via an all printed, hybrid, and state of the art fabrication approach. Bottom Ag electrodes, active layer of hybrid MoS2-PVA nanocomposite and top Ag electrode are deposited by reverse offset, electrohydrodynamic (EHD) atomization and electrohydrodynamic (EHD) patterning respectively. The fabricated device displayed characteristic bistable, nonvolatile and rewritable resistive switching behavior at a low operating voltage. A decent off/on ratio, high retention time, and large endurance of 1.28 × 102, 105 sec and 1000 voltage sweeps were recorded respectively. Double logarithmic curve satisfy the trap controlled space charge limited current (TCSCLC) model in high resistance state (HRS) and ohmic model in low resistance state (LRS). Bendability test at various bending diameters (50-2 mm) for 1500 cycles was carried out to show the mechanical robustness of fabricated device.

Abstract: Implementation of biocompatible materials in resistive switching memory (ReRAM) devices provides opportunities to use them in biomedical applications. We demonstrate a robust, nonvolatile, flexible, and transparent ReRAM based on potato starch. We also introduce a biomolecular memory device that has a starch-chitosan composite layer. The ReRAM behavior can be controlled by mixing starch with chitosan in the resistive switching layer. Whereas starch-based biomemory devices which show abrupt changes in current level; the memory device with mixed biopolymers undergoes gradual changes. Both devices exhibit uniform and robust programmable memory properties for nonvolatile memory applications. The explicated source of the bipolar resistive switching behavior is assigned to formation and rupture of carbon-rich filaments. The gradual set/reset behavior in the memory device based on a starch-chitosan mixture makes it suitable for use in neuromorphic devices.

Abstract: The resistive-switching memory (RRAM) is currently under consideration for fast nonvolatile memory thanks to its relatively low cost and high performance. A key concern for RRAM reliability is stochastic switching, which impacts the operation of the digital memory due to distribution broadening. On the other hand, stochastic behaviors are enabling mechanisms for some computing tasks, such as physical unclonable function (PUF) and random number generation (RNG). Here, we present new circuit blocks for physical RNG, based on the coupling of two RRAM devices. The two-resistance scheme allows to overcome the need of probability tracking, where the operation voltage must be tuned to adjust the generation probabilities of 0 and 1. Probability tests are proved successful for one of the three proposed schemes.

Abstract: Enhancing the device performance of organic memory devices while providing high optical transparency and mechanical flexibility requires an optimized combination of functional materials and smart device architecture design. However, it remains a great challenge to realize fully functional transparent and mechanically durable nonvolatile memory because of the limitations of conventional rigid, opaque metal electrodes. Here, we demonstrate ferroelectric nonvolatile memory devices that use graphene electrodes as the epitaxial growth substrate for crystalline poly(vinylidene fluoride-trifluoroethylene) (PVDF-TrFE) polymer. The strong crystallographic interaction between PVDF-TrFE and graphene results in the orientation of the crystals with distinct symmetry, which is favorable for polarization switching upon the electric field. The epitaxial growth of PVDF-TrFE on a graphene layer thus provides excellent ferroelectric performance with high remnant polarization in metal/ferroelectric polymer/metal devices. Fur...

Abstract: Flexible resistive random access memory (RRAM) devices have attracted great interest for future nonvolatile memories. However, making active layer films at high temperature can be a hindrance to RRAM device fabrication on flexible substrates. Here, we introduced a flexible nanoporous (NP) WO3–x RRAM device using anodic treatment in a room-temperature process. The flexible NP WO3–x RRAM device showed bipolar switching characteristics and a high ION/IOFF ratio of ∼105. The device also showed stable retention time over 5 × 105 s, outstanding cell-to-cell uniformity, and bending endurance over 103 cycles when measured in both the flat and the maximum bending conditions.

Abstract: Nonvolatile charge-trap memory plays an important role in many modern electronics technologies, from portable electronic systems to large-scale data centers Conventional charge-trap memory devices typically work with fixed channel carrier polarity and device characteristics However, many emerging applications in reconfigurable electronics and neuromorphic computing require dynamically tunable properties in their electronic device components that can lead to enhanced circuit versatility and system functionalities Here, we demonstrate an ambipolar black phosphorus (BP) charge-trap memory device with dynamically reconfigurable and polarity-reversible memory behavior This BP memory device shows versatile memory properties subject to electrostatic bias Not only the programmed/erased state current ratio can be continuously tuned by the back-gate bias, but also the polarity of the carriers in the BP channel can be reversibly switched between electron- and hole-dominated conductions, resulting in the erased

Abstract: Solid-state memory is an essential component of the digital age. With advancements in healthcare technology and the Internet of Things (IoT), the demand for ultra-dense, ultra-low-power memory is increasing. In this review, we present a comprehensive perspective on the most notable approaches to the fabrication of physically flexible memory devices. With the future goal of replacing traditional mechanical hard disks with solid-state storage devices, a fully flexible electronic system will need two basic devices: transistors and nonvolatile memory. Transistors are used for logic operations and gating memory arrays, while nonvolatile memory (NVM) devices are required for storing information in the main memory and cache storage. Since the highest density of transistors and storage structures is manifested in memories, the focus of this review is flexible NVM. Flexible NVM components are discussed in terms of their functionality, performance metrics, and reliability aspects, all of which are critical components for NVM technology to be part of mainstream consumer electronics, IoT, and advanced healthcare devices. Finally, flexible NVMs are benchmarked and future prospects are provided.

Abstract: Organic field-effect transistors (OFETs) featuring a photoactive hybrid bilayer dielectric (PHBD) that comprises a self-assembled monolayer (SAM) of photochromic diarylethenes (DAEs) and an ultrathin solution-processed hafnium oxide layer are described here. We photoengineer the energy levels of DAE SAMs to facilitate the charging and discharging of the interface of the two dielectrics, thus yielding an OFET that functions as a nonvolatile memory device. The transistors use light signals for programming and electrical signals for erasing (≤3 V) to produce a large, reversible threshold-voltage shift with long retention times and good nondestructive signal processing ability. The memory effect can be exercised by more than 104 memory cycles. Furthermore, these memory cells have demonstrated the capacity to be arrayed into a photosensor matrix on flexible plastic substrates to detect the spatial distribution of a confined light and then store the analog sensor input as a two-dimensional image with high preci...

Abstract: Transparent nonvolatile memory has great potential in integrated transparent electronics. Here, we present highly transparent resistive switching memory using stoichiometric WO3 film produced by cathodic electrodeposition with indium tin oxide electrodes. The memory device demonstrates good optical transmittance, excellent operative uniformity, low operating voltages (+0.25 V/–0.42 V), and long retention time (>104 s). Conductive atomic force microscopy, ex situ transmission electron microscopy, and X-ray photoelectron spectroscopy experiments directly confirm that the resistive switching effects occur due to the electric field-induced formation and annihilation of the tungsten-rich conductive channel between two electrodes. Information on the physical and chemical nature of conductive filaments offers insightful design strategies for resistive switching memories with excellent performances. Moreover, we demonstrate the promising applicability of the cathodic electrodeposition method for future resistive ...

Abstract: An increasing demand for nonvolatile memory has driven extensive research on resistive switching memory because it uses simple structures with high density, fast switching speed, and low power consumption. To improve the storage density, the application of multilevel cells is among the most promising solutions, including three-dimensional cross-point array architectures. Two-dimensional nanomaterials have several advantages as resistive switching media, including flexibility, low cost, and simple fabrication processes. However, few reports exist on multilevel nonvolatile memory and its switching mechanism. We herein present a multilevel resistive switching memory based on graphene oxide (GO) and MoS2 fabricated by a simple spin-coating process. Metallic 1T-MoS2 nanosheets, chemically exfoliated by Li intercalation, were successfully embedded between two GO layers as charge-trapping sites. The resulting stacks of GO/MoS2/GO exhibited excellent nonvolatile memory performance with at least four resistance states, >102 endurance cycles, and >104 s retention time. Furthermore, the charge transport mechanism was systematically investigated through the analysis of low-frequency 1/f noise in various resistance states, which could be modulated by the input voltage bias in the negative differential resistance region. Accordingly, we propose a strategy to achieve multilevel nonvolatile memory in which the stacked layers of two-dimensional nanosheets are utilized as resistive and charge-storage materials.

Abstract: The next generation of nonvolatile memory storage may well be based on resistive switching in metal oxides. TiO2 as transition metal oxide has been widely used as active layer for the fabrication of a variety of multistate memory nanostructure devices. However, progress in their technological development has been inhibited by the lack of a thorough understanding of the underlying switching mechanisms. Here, we employed high-angle annular dark-field scanning transmission electron microscopy (HAADF-STEM) combined with two-dimensional energy dispersive X-ray spectroscopy (2D EDX) to provide a novel, nanoscale view of the mechanisms involved. Our results suggest that the switching mechanism involves redistribution of both Ti and O ions within the active layer combined with an overall loss of oxygen that effectively render conductive filaments. Our study shows evidence of titanium movement in a 10 nm TiO2 thin-film through direct EDX mapping that provides a viable starting point for the improvement of the robu...