About: Non-volatile memory is a research topic. Over the lifetime, 21068 publications have been published within this topic receiving 351075 citations. The topic is also known as: nonvolatile memory & NVM.
TL;DR: The racetrack memory described in this review comprises an array of magnetic nanowires arranged horizontally or vertically on a silicon chip and is an example of the move toward innately three-dimensional microelectronic devices.
Abstract: Recent developments in the controlled movement of domain walls in magnetic nanowires by short pulses of spin-polarized current give promise of a nonvolatile memory device with the high performance and reliability of conventional solid-state memory but at the low cost of conventional magnetic disk drive storage. The racetrack memory described in this review comprises an array of magnetic nanowires arranged horizontally or vertically on a silicon chip. Individual spintronic reading and writing nanodevices are used to modify or read a train of ∼10 to 100 domain walls, which store a series of data bits in each nanowire. This racetrack memory is an example of the move toward innately three-dimensional microelectronic devices.
TL;DR: In this paper, the authors review the current status of one of the alternatives, resistance random access memory (ReRAM), which uses a resistive switching phenomenon found in transition metal oxides.
TL;DR: The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide resistive switching random access memory (RRAM) are discussed, with a focus on the use of RRAM for nonvolatile memory application.
Abstract: In this paper, recent progress of binary metal-oxide resistive switching random access memory (RRAM) is reviewed. The physical mechanism, material properties, and electrical characteristics of a variety of binary metal-oxide RRAM are discussed, with a focus on the use of RRAM for nonvolatile memory application. A review of recent development of large-scale RRAM arrays is given. Issues such as uniformity, endurance, retention, multibit operation, and scaling trends are discussed.
TL;DR: In this article, the authors describe the preparation and characterization of thin-film capacitors using ferroelectric materials from a large family of layered perovskite oxides, exemplified by SrBi2Ta2O9, SRBi2NbTaO9 and SrBi4Ta4O15.
Abstract: A SIGNIFICANT fraction of the computer memory industry is at present involved in the manufacture of non-volatile memory devices1—that is, devices which retain information when power is interrupted. For such applications (and also for volatile memories), the use of capacitors constructed from ferroelectric thin films has stimulated much interest1. In such structures, information is stored in the polarization state of the ferroelectric material itself, which should in principle lead to lower power requirements, faster access time and potentially lower cost1. But the use of ferroelectrics is not without problems; the memories constructed to date have generally suffered from poor retention of stored information and degradation of performance ('fatigue') with use1–3. Here we describe the preparation and characterization of thin-film capacitors using ferroelectric materials from a large family of layered perovskite oxides, exemplified by SrBi2Ta2O9, SrBi2NbTaO9 and SrBi4Ta4O15. The structural flexibility of these materials allows their properties to be tailored so that many of the problems associated with previous ferroelectric memories are avoided. In particular, our capacitors do not show significant fatigue after 1012 switching cycles, and they exhibit good retention characteristics and low leakage currents even with films less than 100 nm thick.
TL;DR: This work demonstrates a TaO(x)-based asymmetric passive switching device with which it was able to localize resistance switching and satisfy all aforementioned requirements, and eliminates any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.
Abstract: Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.